pnx1700 NXP Semiconductors, pnx1700 Datasheet - Page 381
pnx1700
Manufacturer Part Number
pnx1700
Description
Connected Media Processor
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1700.pdf
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Philips Semiconductors
Volume 1 of 1
PNX17XX_SER_1
Preliminary data sheet
3.2 Setup Order for the QVCP
Table 5: Data Packet Descriptor
The following order is recommended for setting up the QVCP for a particular display
scenario:
Bit
31
59:32
63:60
61:...
Figure 7:
•
•
79
63
47
31
15
The screen timing generator setup should be performed first since this is usually
fixed for the target display. Once the screen timing is set up the screen timing
generator should still stay disabled until all other settings are complete.
In a second step the resource assignment for a particular display scenario should
be set up. This involves two sub-steps:
–
0
P
I
Each functional unit, whether it is located inside a layer or in the resource pool,
should be assigned to an aperture slot in the overall QVCP aperture.
VBI-DATA Byte n
VBI-DATA Byte 3
VBI-DATA Byte 1
V
S
Field ID
Description
Data type
0=VBI data
1=register reprogram data for internal QVCP registers
Next packet address
Unused
Data
if bit 31=0, the data block consists of byte VBI data
if bit 31=1, each qword in the data portion is:
15:0 QVCP register address
31:16 unused
63:32 register data
VBI-Packet Format
VBI/Programming Data Packet Formats
MSB
Next Packet Address [59:32]
Data Byte Count [12:0]
Packet Insertion Line
Rev. 1 — 17 March 2006
...
VBI-DATA Byte n-1
VBI-DATA Byte 2
VBI-DATA Byte 0
…Continued
LSB
64
48
32
16
0
79
47
31
15
63
MSB
MSB
MSB
1
P
I
V
S
Field ID
Programming Data-Packet Format
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
QVCP Register Address n
QVCP Register Address 1
QVCP Register Address 0
MSB
PNX17xx Series
QVCP Data n [31:0]
QVCP Data 1 [31:0]
QVCP Data 0 [31:0]
Next Packet Address [59:32]
Data Byte Count [12:0]
Packet Insertion Line
...
...
...
...
...
Chapter 11: QVCP
LSB
LSB
LSB
LSB
11-24
64
48
32
16
0
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