mc68hc05l25 Freescale Semiconductor, Inc, mc68hc05l25 Datasheet - Page 119

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mc68hc05l25

Manufacturer Part Number
mc68hc05l25
Description
M68hc05 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
13.4 Event Counter Timing Register
This register controls generation of the gate signal which is used to control the input to the event counter.
See
The value in the event counter timing register determines the length of the measurement and the length
of the wait time between measurements. See
MT3 through MT0, determine the length of time that the input gate on the EVI pin is open. During this time
the gate
signal is a logic 1. The wait time bits, WT3 through WT0, determine the length of time that the gate signal
is a logic 0. t
Specifications.
After being enabled, EVCE = 1, the event counter will make measurements continuously. If the event
counter timing register is written, the current measurement will be aborted, and a new measurement will
be initiated.
The input to the event counter is the logical AND of the signal on the EVI pin and the internally generated
gate signal. The rising edges of the counter input signal are used to generate the events that increment
the counter. If the pulse width of the ANDed signal is less than that which the circuitry is capable of
detecting, the narrow pulse will not be allowed to pass through the filter.
Freescale Semiconductor
Figure
COUNTER
13-5.
gc
SIGNAL
COUNT
INPUT
Address:
GATE
is the length of a unit count. The specification for t
EVI
Reset:
Read:
Write:
1
Figure 13-4. Event Counter Input Timing Example
$002F
WT3
Bit 7
Figure 13-3. Event Counter Timing Register (EVTR)
1
2
3
MT3:0 X t
WT2
6
1
MC68HC05L25 Data Sheet, Rev. 3.1
. . .
. . .
GC
WT1
5
1
N-1
Table 13-1
N
WT0
4
1
and
WT3:0 X t
MT3
3
1
Table
GC
gc
is found in
13-2. The measurement time bits,
MT2
2
1
1
2
Event Counter Timing Register
MT1
1
1
Chapter 15 Electrical
3
4
Bit 0
MT0
1
5
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