mc68hc05l25 Freescale Semiconductor, Inc, mc68hc05l25 Datasheet - Page 22

• Manufacturer Part Number: mc68hc05l25
• Description: M68hc05 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

General Description
minimize output distortion. An internal startup feedback resistor of R
between XOSC1 and XOSC2 and
xof
a damping resistor of R
in series to XOSC2 can be selected as a mask option.
xod
1.5.5.2 External Clock
As shown in
Figure
1-5(b), an external clock from another CMOS-compatible device can be connected to
the XOSC1 input (with the XOSC2 output not connected). This configuration is possible regardless of the
oscillator setup.
1.5.5.3 XOSC Not Used
When XOSC is not used, the XOSC1 pin must be connected to the RESET pin to assure proper
initialization of the clock circuitry. XOSC2 pin should remain unconnected.
1.5.6 PA0–PA2/KWI0–KWI2, PA3/KWI3/BZ, PA4/AD0/EVI, PA5/ADI, PA6/RMO, and PA7
Port A is an 8-bit I/O port. The state of any pin is software programmable and all port A lines are configured
as inputs during power-on or reset. Bits 0 through 3 are shared with the key wakeup subsystem, and bit
3 also is shared with the buzzer subsystem. Bit 4 is shared with the A/D converter and event counter. Bit
5 is shared with the A/D converter. Bit 6 is shared with the infrared (IR) remote output. See
Chapter 7
Input/Output Ports (I/O)
for more details on the I/O ports.
1.5.7 PB0–PB7/FP24–FP17
These eight I/O lines comprise port B. The state of any pin is software programmable, and all bits are
configured as LCD output during power-on or reset. These bits are shared with LCD frontplane drivers.
See
Chapter 7 Input/Output Ports (I/O)
for more details on the I/O ports.
1.5.8 PC0/SCK, PC1/SDO, PC2/SDI, and PC3/IRQ
These four I/O lines comprise port C. Bits 0 through 2 are shared with the SPI subsystem. Bit 3 is shared
with the IRQ input. The state of any pin is software programmable, and all port C lines are configured as
port inputs during power-on or reset. Each port C pin can be configured with a pullup resistor by a software
option. SPI output pins SCK and SDO can be configured as open-drain outputs by a software option. See
Chapter 7 Input/Output Ports (I/O)
for more details on the I/O ports. The PC3/IRQ pin is used for special
mode entry. Do not apply voltages above V
for normal single-chip mode operation. See
Chapter 15
DD
Electrical Specifications
for more details.
1.5.9 BP3/FP0, FP1–FP18, and PB0–PB7/FP24–FP17
The LCD display has 25 frontplane drivers. Frontplanes 17 through 24 are shared with port B bits 7
through 0, respectively. Frontplane 0 is shared with backplane 3. See
Chapter 11 LCD Driver
for
additional information.
1.5.10 BP0–BP2 and BP3/FP0
The LCD display has four backplane drivers. Backplane 3 is multiplexed with frontplane 0. See
Chapter 11 LCD Driver
for additional information.
MC68HC05L25 Data Sheet, Rev. 3.1
22
Freescale Semiconductor