mc68hc05l25 Freescale Semiconductor, Inc, mc68hc05l25 Datasheet - Page 62

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mc68hc05l25

Manufacturer Part Number
mc68hc05l25
Description
M68hc05 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Input/Output Ports (I/O)
7.3.1 Port B Data Register
Each port B I/O pin has a corresponding bit in the port B data register. When a port B pin is programmed
as an output, the state of the corresponding data register bit determines the state of the output pin. When
a port B pin is programmed as an input, any read of the port B data register will return the logic state of
the corresponding I/O pin. The port B data register is unaffected by reset.
7.3.2 Port B Data Direction Register
Each port B I/O pin can be programmed as an input by clearing the corresponding bit in the DDRB or
programmed as an output by setting the corresponding bit in the DDRB. The DDRB can be accessed at
address $0001 of the option map. The DDRB is cleared by reset.
7.3.3 Port B Pullup Register
Each port B pin may have a software programmable pullup device enabled by the RCR select bits RBH
and RBL. The pullup is activated whenever the corresponding bit in the RCR is set. Since reset clears the
RCR, all pins will initialize with the pullup devices disabled. See
7.3.4 Port B Wire-ORed Mode Register
Port B bits 0–7 configured for output pins may have software programmable wired-OR mode (open drain)
output enabled by the BWOMH and BWOML bits in the WOMR. Since reset clears the WOMR, the
wired-OR mode becomes disabled on reset. See
62
Address:
Address:
Do not turn on port B pullups when LCD is selected for corresponding port
pin.
Reset:
Reset:
Read:
Read:
Write:
Write:
DDRB7
$0001
Bit 7
PB7
Bit 7
Option — $0001
Figure 7-12. Port B Data Direction Register (DDRB)
Figure 7-11. Port B Data Register (PORTB)
DDRB6
PB6
6
6
MC68HC05L25 Data Sheet, Rev. 3.1
DDRB5
PB5
5
5
NOTE
DDRB4
7.5.8 Open Drain Output Control
Unaffected by Reset
Unaffected by Reset
PB4
4
4
DDRB3
PB3
3
3
7.5.6 Resistor Control Register
DDRB2
PB2
2
2
DDRB1
PB1
1
1
Register.
Freescale Semiconductor
DDRB0
Bit 0
Bit 0
PB0
1.

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