mc68hc05l25 Freescale Semiconductor, Inc, mc68hc05l25 Datasheet - Page 76

• Manufacturer Part Number: mc68hc05l25
• Description: M68hc05 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Oscillators and Clock
8.4 OSC and XOSC
The secondary oscillator (XOSC) runs continuously after power-up. The main oscillator (OSC) can be
stopped to conserve power via the STOP instruction or clearing the FOSCE bit in the MISC register. The
effects of restarting the OSC will vary depending on the current state of the MCU, including SYS0–SYS1
and FOSCE bits.
8.5 OSC On Line
If the system clock is OSC, FOSCE should remain set. Executing the STOP instruction in this condition
will halt OSC, put the MCU into a low-power mode and clear the 6-bit POR counter. The 7-bit divider is
not initialized. Exiting STOP with external IRQ or RESET re-starts the oscillator. When the POR counter
overflows, internal reset is released and execution can begin. The stabilization time will vary between
8064 and 8192 counts.
8.6 XOSC On Line
If XOSC is the system clock (SYS0–SYS1 = 1–1), OSC can be stopped either by the STOP instruction or
by clearing the FOSCE bit.
The suboscillator (XOSC) never stops except during powerdown. This clock can also be used as the clock
source of the system clock and time base.
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Do not switch the system clock to XOSC (SYS1–SYS0 = 11) when XOSC
clock is not available. XOSC clock is available when STUP flag is set.
Do not switch the system clock to OSC (SYS1–SYS0 = 00, 01, or 10) when
OSC clock is not available. OSC clock is available when FTUP flag is set.
Exiting STOP with external IRQ will always return the MCU to the state as
defined by the register definitions prior to executing the STOP instruction.
OPTION
MASK
Figure 8-1. OSC1, OSC2, XOSC1, and XOSC2 Mask Options
OSC1
OSC
R
MC68HC05L25 Data Sheet, Rev. 3.1
f
OSC2
OFF CHIP
ON CHIP
NOTE
NOTE
XOSC1
XOSC
R
xf
R
XOSC2
xd
MASK
OPTION
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