mc68hc05l25 Freescale Semiconductor, Inc, mc68hc05l25 Datasheet - Page 40

• Manufacturer Part Number: mc68hc05l25
• Description: M68hc05 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Resets
5.3.1 Power-On Delay (POD)
The internal POD is generated on power-up to allow the clock oscillator to stabilize. The POD is strictly
for power turn-on conditions and is not able to detect a drop in the power supply voltage (brown-out).
There is an oscillator stabilization delay of between 8,064 and 8,192 internal processor bus clock cycles
(PH2) after the oscillator becomes active.
The power-on reset (POR) will generate the RST signal which will reset the CPU. If any other reset
function is active at the end of this 8,064- to 8,192-cycle delay, the RST signal will remain in the reset
condition until the other reset condition(s) end.
5.3.2 Computer Operating Properly Reset (COPR)
The internal COPR reset is generated automatically (if enabled via a TBCR2 select bit) by a timeout of
the COP watchdog timer. This timeout occurs if the counter in the COP watchdog timer is not reset
(cleared) within a specific time by a program reset sequence. The COP watchdog timer can be disabled
by a TBCR2 select bit. Refer to
9.2.4 COP
for more information on this timeout feature.
The COPR will generate the RST signal which will reset the CPU and other peripherals. If any other reset
function is active at the end of the COPR reset signal, the RST signal will remain in the reset condition
until the other reset condition(s) end.
MC68HC05L25 Data Sheet, Rev. 3.1
40
Freescale Semiconductor