mc68hc05l25 Freescale Semiconductor, Inc, mc68hc05l25 Datasheet - Page 53

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mc68hc05l25

Manufacturer Part Number
mc68hc05l25
Description
M68hc05 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
7.2.1 Port A Data Register
Each port A I/O pin has a corresponding bit in the port A data register. When a port A pin is programmed
as an output, the state of the corresponding data register bit determines the state of the output pin. When
a port A pin is programmed as an input, any read of the port A data register will return the logic state of
the corresponding I/O pin. The port A data register is unaffected by reset.
7.2.2 Port A Data Direction Register
Each port A I/O pin may be programmed as an input by clearing the corresponding bit in the DDRA or
may be programmed as an output by setting the corresponding bit in the DDRA. The DDRA can be
accessed at address $0000 of the option map. The DDRA is cleared by reset.
Freescale Semiconductor
INTERNAL HC05
DATA BUS
WRITE $0000
WRITE OPTN:$000A
WRITE OPTN:$0008
WRITE OPTN:$0000
READ OPTN:$000A
READ $0000
READ OPTN:$0008
READ OPTN:$0000
Address:
Address:
Reset:
Reset:
Read:
Read:
Write:
Write:
DDRA7
$0000
$0000
RESET
Bit 7
PA7
Bit 7
(RST)
0
Figure 7-8. Port A Data Direction Register
DDRA6
PA6
6
6
0
DATA DIRECTION
Figure 7-7. Port A Data Register
Figure 7-6. Port A7 I/O Circuitry
REGISTER BIT
REGISTER BIT
REGISTER BIT
REGISTER BIT
OPEN DRAIN
MC68HC05L25 Data Sheet, Rev. 3.1
PULLUP
DATA
DDRA5
PA5
5
5
0
DDRA4
Unaffected by Reset
PA4
4
4
0
DDRA3
PA3
3
3
0
DDRA2
PA2
PULLUP
2
2
0
LOGIC
DDRA1
PA1
OUTPUT
1
1
0
DDRA0
Bit 0
Bit 0
PA0
0
R PULLUP
PIN
I/O
Port A
53

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