mc68hc05l25 Freescale Semiconductor, Inc, mc68hc05l25 Datasheet - Page 78

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mc68hc05l25

Manufacturer Part Number
mc68hc05l25
Description
M68hc05 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Oscillators and Clock
8.7 Stop and Wait Modes
During stop mode, the main oscillator (OSC) is shut down and the clock path from the second oscillator
(XOSC) is disconnected, such that all modules except time base are halted. Entering stop mode clears
the FTUP flag in the MISC register and initializes the POR counter. Stop mode is exited by RESET, IRQ,
KWI, SPI (slave mode), or TBI interrupt.
If OSC is selected as the system clock source during stop mode, CPU resumes after the overflow of the
POR counter, and this overflow also sets FTUP status flag.
If XOSC is selected as the system clock source during stop mode, no stop recovery time is required for
exiting stop mode because XOSC never stops, and re-start of main oscillator depends on FOSCE bit.
During wait mode, only the CPU clocks are halted and the peripheral modules are not affected. Wait mode
is exited by the RESET and any interrupts.
8.8 XOSC Clock Divider and POD Counter
The XOSC clock divided by a 14-bit counter, also called power-on divider (POD), is used for the system
clock. The oscillator clock divided by two is used by the system clock and oscillator clock divided by 64
or 128 is provided for the LCD module.
The overflow of the POD counter is used for setting the STUP bit and releasing power-on reset (POR).
The 14-bit divider/POD counter is initialized to $0078 by power-on detection.
8.9 System Clock Control
The system clock (PH2) is provided for CPU and all internal modules.
78
Power-on reset is strictly for power-on conditions and does not detect a
drop in power.
CPU Clock Source
XOSC (OSC OFF)
1. Do not enter this state.
2. This state does not exist.
XOSC (OSC ON)
OSC (OSC OFF)
OSC (OSC ON)
Before RESET or Interrupt
Table 8-2. CPU Startup Time Requirements
STOP
STOP
STOP
STOP
CPU
RUN
RUN
RUN
RUN
MC68HC05L25 Data Sheet, Rev. 3.1
FOSCE
0 1
0 2
1
1
1
0
1
0
NOTE
Power-On
Reset
Delay
No Delay
No Delay
External
RESET
Delay
Delay
Delay
Delay
Delay
Delay
Exit Stop Mode
by an Interrupt
No Delay
No Delay
Delay
Delay
Freescale Semiconductor

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