tmp88fw45afg TOSHIBA Semiconductor CORPORATION, tmp88fw45afg Datasheet - Page 163

• Manufacturer Part Number: tmp88fw45afg
• Description: 8 Bit Microcontroller Tlcs-870/x Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Timer Circuit Registers [Addresses (PMD1 and PMD2)]
(01FA5H)
(01FD5H)
(01FA4H)
(01FD4H)
MTCRB
MTCRA
Note:Read-modify-write instructions, such as a bit manipulation instruction, cannot access the MTCRB because it
Note 1: When changing MTCRA<TMCK> setting, keep the MTCRA<TMEN> bit reset to “0” (disable mode timer).
Note 2: Read-modify-write instructions, such as a bit manipulation instruction, cannot access the MTCRA because it contains a
7, 6, 5
contains a write-only bit.
DBOUT
7
5
3
2
1
4
3
2
1
0
write-only bit.
7
7
DBOUT
TMOF
CLCP
SWCP
PDCCP
TMCK
RBTM3
RBCL
SWRES
RBPDC
TMEN
TMCK
6
6
-
TMOF
Debug output
Mode timer overflow
Capture mode timer by overload
protection
Capture mode timer in software
Capture mode timer by position
detection
Select clock
Reset mode timer from Timer 3
Reset mode timer by overload
protection
Reset mode timer in software
Reset mode timer by position
detection
Enable/disable mode timer
5
5
RBTM3
4
4
-
CLCP
RBCL
3
3
Page 149
SWRES
0: Disable
1: Enable (P67 for PMD1, P77 for PMD2)
0: No overflow
1: Overflowed
0: Disable
1: Enable
0: No operation
1: Capture
0: Disable
1: Enable
000: fc/2
010: fc/2
100: fc/2
110: fc/2
001: fc/2
011: Reserved
101: Reserved
111: Reserved
0: Disable
1: Enable
0: Disable
1: Enable
0: No operation
1: Reset
0: Disable
1: Enable
0: Disable
1: Enable timer start
SWCP
2
2
3
4
5
6
7
(400 ns at 20 MHz)
(800 ns at 20 MHz)
(1.6 μs at 20 MHz)
(3.2 μs at 20 MHz)
(6.4 μs at 20 MHz)
PDCCP
RBPDC
1
1
TMEN
0
0
-
(Initial value: 0*0*0 000*)
(Initial value: 0000 0000)
TMP88FW45AFG
R/W
R/W
R/W
R/W
R/W
W
W
R