tmp88fw45afg TOSHIBA Semiconductor CORPORATION, tmp88fw45afg Datasheet - Page 209

• Manufacturer Part Number: tmp88fw45afg
• Description: 8 Bit Microcontroller Tlcs-870/x Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

16.9
16.9.1
16.9.2
16.9.3
Status Flag
UARTSR2<PERR> is set to “1”. The UARTSR2<PERR> is cleared to “0” when the RDBUF2 is read after
reading the UARTSR2.
The UARTSR2<FERR> is cleared to “0” when the RDBUF2 is read after reading the UARTSR2.
UARTSR2<OERR> is set to “1”. In this case, the receive data is discarded; data in RDBUF2 are not affected.
The UARTSR2<OERR> is cleared to “0” when the RDBUF2 is read after reading the UARTSR2.
When parity determined using the receive data bits differs from the received parity bit, the parity error flag
When “0” is sampled as the stop bit in the receive data, framing error flag UARTSR2<FERR> is set to “1”.
When all bits in the next data are received while unread data are still in RDBUF2, overrun error flag
RXD pin
UARTSR2<FERR>
INTRXD interrupt
Shift register
Parity Error
Framing Error
Overrun Error
Shift register
RXD pin
UARTSR2<PERR>
INTRXD interrupt
Figure 16-6 Generation of Framing Error
Figure 16-5 Generation of Parity Error
xxxx0 **
xxx0 **
Final bit
Parity
Page 195
pxxxx0
xxxx0
Stop
*
*
Stop
1pxxxx0
0xxxx0
After reading UARTSR2 then
RDBUF2 clears FERR.
After reading UARTSR2 then
RDBUF2 clears PERR.
TMP88FW45AFG