tmp88fw45afg TOSHIBA Semiconductor CORPORATION, tmp88fw45afg Datasheet - Page 199

• Manufacturer Part Number: tmp88fw45afg
• Description: 8 Bit Microcontroller Tlcs-870/x Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

15.6
15.7
15.8
15.8.1
15.8.2
Select a transmit stop bit length (1 bit or 2 bits) by UARTCR1<STBT>.
Set parity / no parity by UARTCR1<PE> and set parity type (Odd- or Even-numbered) by UARTCR1<EVEN>.
STOP Bit Length
Parity
Transmit/Receive Operation
(Transmit data buffer). Writing data in TDBUF zero-clears UARTSR<TBEP>, transfers the data to the transmit
shift register and the data are sequentially output from the TXD pin. The data output include a one-bit start bit,
stop bits whose number is specified in UARTCR1<STBT> and a parity bit if parity addition is specified. Select
the data transfer baud rate using UARTCR1<BRG>. When data transmit starts, transmit buffer empty flag
UARTSR<TBEP> is set to “1” and an INTTXD interrupt is generated.
written to TDBUF, the TXD pin is fixed at high level. When transmitting data, first read UARTSR, then write
data in TDBUF. Otherwise, UARTSR<TBEP> is not zero-cleared and transmit does not start.
RDBUF (Receive data buffer). At this time, the data transmitted includes a start bit and stop bit(s) and a parity
bit if parity addition is specified. When stop bit(s) are received, data only are extracted and transferred to RDBUF
(Receive data buffer). Then the receive buffer full flag UARTSR<RBFL> is set and an INTRXD interrupt is
generated. Select the data transfer baud rate using UARTCR1<BRG>.
data buffer) but discarded; data in the RDBUF are not affected.
Set UARTCR1<TXE> to “1”. Read UARTSR to check UARTSR<TBEP> = “1”, then write data in TDBUF
While UARTCR1<TXE> = “0” and from when “1” is written to UARTCR1<TXE> to when send data are
Set UARTCR1<RXE> to “1”. When data are received via the RXD pin, the receive data are transferred to
If an overrun error (OERR) occurs when data are received, the data are not transferred to RDBUF (Receive
Data Transmit Operation
Data Receive Operation
Note:When a receive operation is disabled by setting UARTCR1<RXE> bit to “0”, the setting becomes valid
when data receive is completed. However, if a framing error occurs in data receive, the receive-disabling
setting may not become valid. If a framing error occurs, be sure to perform a re-receive operation.
Page 185
TMP88FW45AFG