tmp88fw45afg TOSHIBA Semiconductor CORPORATION, tmp88fw45afg Datasheet - Page 210

• Manufacturer Part Number: tmp88fw45afg
• Description: 8 Bit Microcontroller Tlcs-870/x Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

16.9
Status Flag
16.9.4
16.9.5
UARTSR2<RBFL> is cleared to “0” when the RDBUF2 is read after reading the UARTSR2.
shift register and data transmit starts, transmit data buffer empty flag UARTSR2<TBEP> is set to “1”. The
UARTSR2<TBEP> is cleared to “0” when the TDBUF2 is written after reading the UARTSR2.
RXD pin
RDBUF2
UARTSR2<RBFL>
INTRXD interrupt
Shift register
Loading the received data in RDBUF2 sets receive data buffer full flag UARTSR2<RBFL> to "1". The
When no data is in the transmit buffer TDBUF2, that is, when data in TDBUF2 are transferred to the transmit
UARTSR2<RBFL>
Receive Data Buffer Full
Transmit Data Buffer Empty
RXD pin
Shift register
RDBUF2
UARTSR2<OERR>
INTRXD interrupt
Note:Receive operations are disabled until the overrun error flag UARTSR2<OERR> is cleared.
Note:If the overrun error flag UARTSR2<OERR> is set during the period between reading the UARTSR2 and
reading the RDBUF2, it cannot be cleared by only reading the RDBUF2. Therefore, after reading the
RDBUF2, read the UARTSR2 again to check whether or not the overrun error flag which should have
been cleared still remains set.
Figure 16-8 Generation of Receive Data Buffer Full
Figure 16-7 Generation of Overrun Error
xxx0 **
yyyy
xxx0 **
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Final bit
Final bit
Page 196
xxxx0
xxxx0
*
*
Stop
Stop
1xxxx0
xxxx
1xxxx0
After reading UARTSR2 then
RDBUF2 clears RBFL.
After reading UARTSR2 then
RDBUF2 clears OERR.
TMP88FW45AFG