tmp88fw45afg TOSHIBA Semiconductor CORPORATION, tmp88fw45afg Datasheet - Page 90

• Manufacturer Part Number: tmp88fw45afg
• Description: 8 Bit Microcontroller Tlcs-870/x Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

8.2
Control
8.2
Oscillation frequency detection control register 1
Oscillation frequency detection control register 2
Lower detection frequency setting register
Higher detection frequency setting register
CLKSCR1
CLKSCR2
CLKSMN
CLKSMX
(1F7FH)
(1F7CH)
(1F7DH)
(1F7EH)
The detection frequency is specified by lower/higher detection frequency setting register (CLKSMN, CLKSMX).
Writing to CLKSCR2/CLKSMN/CLKSMX is controlled by oscillation frequency control register 1 (CLKSCR1).
Note 1: Only "06H" and "F9H" is valid to CLKSCR1. If other value than "06H" and "F9H" is written to CLKSCR1, "06H" is
Note 2: CLKSCR1 is not initialized by an internal factor reset including oscillation frequency detection reset. To initialize
Note 1: Only "00H" and "E4H" is valid to CLKSCR2. Writing other value than "00H" and "E4H" to CLKSCR2 with
Note 2: Writing to CLKSCR2 is protected by setting "06H" to CLKSCR1 but reading from CLKSCR2 is always enabled
Note 3: CLKSCR2 is not initialized by an internal factor reset including oscillation frequency detection reset. To initialize
Control
The oscillation frequency detection is controlled by oscillation frequency detection control register 2 (CLKSCR2).
Note 1: CLKSMN and CLKSMX can not be written when the oscillation frequency detection circuit is enabled (CLKSCR2="E4H")
Note 2: Writing to CLKSMN/CLKSMX is protected by setting "06H" to CLKSCR1 but reading from CLKSMN/CLKSMX is always
Note 3: Specify an appropriate value to CLKSMN and CLKSMX depending on the clock frequency to be used under the condition
Note 4: CLKSMN and CLKSMX are not initialized by an internal factor reset including oscillation frequency detection reset. To
written to CLKSCR1 automatically.
this registers, set the RESET pin (external factor reset) to the low level.
CLKSCR1="F9H" is ignored.
without setting of CLKSCR1.
this registers, set the RESET pin (external factor reset) to the low level.
7
7
7
7
or writing is disabled with CLKSCR1="06H". An attempt to write CLKSMN and CLKSMX can not complete a write oper-
ation.
enabled without setting of CLKSCR1.
of CLKSMN<CLKSMX. For how to calculate the value, refer to "8.3.2 Setting the Lower and Higher Frequency for De-
tection".
initialize these registers, set the RESET pin (external factor reset) to the low level.
6
6
6
6
CLKSCR1
CLKSCR2
5
5
5
5
Writing control of
CLKSCR2, CLKSMN
and CLKSMX registers
Control the oscillation fre-
quency detection circuit
behavior
4
4
4
4
3
3
3
3
Page 76
06H: Disabling of writing to CLKSCR2/CLKSMN/CLKSMX
F9H: Enabling of writing to CLKSCR2/CLKSMN/CLKSMX
Others: Reserved (Note 1)
00H: Disable
E4H: Enable
Others: Reserved (Note 1)
2
2
2
2
1
1
1
1
0
0
0
0
Initial value( 0000 0110)
Initial value( 0000 0000)
Read/Write
Initial value( 0010 0000)
Read/Write
Initial value(0100 0000)
TMP88FW45AFG
R/W
R/W