tmp88fw45afg TOSHIBA Semiconductor CORPORATION, tmp88fw45afg Datasheet - Page 201

• Manufacturer Part Number: tmp88fw45afg
• Description: 8 Bit Microcontroller Tlcs-870/x Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

15.9.4
15.9.5
UARTSR<RBFL> is cleared to “0” when the RDBUF is read after reading the UARTSR.
shift register and data transmit starts, transmit data buffer empty flag UARTSR<TBEP> is set to “1”. The
UARTSR<TBEP> is cleared to “0” when the TDBUF is written after reading the UARTSR.
RXD pin
RDBUF
UARTSR<RBFL>
INTRXD interrupt
Shift register
Loading the received data in RDBUF sets receive data buffer full flag UARTSR<RBFL> to "1". The
When no data is in the transmit buffer TDBUF, that is, when data in TDBUF are transferred to the transmit
Receive Data Buffer Full
Transmit Data Buffer Empty
UARTSR<RBFL>
RXD pin
RDBUF
UARTSR<OERR>
INTRXD interrupt
Shift register
Note:Receive operations are disabled until the overrun error flag UARTSR<OERR> is cleared.
Note:If the overrun error flag UARTSR<OERR> is set during the period between reading the UARTSR and
reading the RDBUF, it cannot be cleared by only reading the RDBUF. Therefore, after reading the
RDBUF, read the UARTSR again to check whether or not the overrun error flag which should have been
cleared still remains set.
Figure 15-8 Generation of Receive Data Buffer Full
Figure 15-7 Generation of Overrun Error
xxx0 **
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xxx0 **
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Final bit
Final bit
Page 187
xxxx0
xxxx0
*
*
Stop
Stop
1xxxx0
xxxx
1xxxx0
After reading UARTSR then
RDBUF clears RBFL.
After reading UARTSR then
RDBUF clears OERR.
TMP88FW45AFG