tmp88fw45afg TOSHIBA Semiconductor CORPORATION, tmp88fw45afg Datasheet - Page 166

• Manufacturer Part Number: tmp88fw45afg
• Description: 8 Bit Microcontroller Tlcs-870/x Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

14.5
Three-phase PWM Output Unit
14.5
14.5.1
width and the commutation function capable of brushless DC motor control. In addition, it has the protective functions
such as overload protection and emergency stop functions necessary to protect the power drive unit, and the dead time
adding function which helps to prevent the in-phase upper/lower transistors from getting shorted by simultaneous turn-
on when switched over.
initially is set to be active low, so that if the output needs to be used active high, set up the MDCRA Register accord-
ingly.
14.5.1.1
The Three-phase PWM Output Unit has the function to generate three-phase PWM waves with any desired pulse
For the PWM output pin (U,V,W,X,Y,Z), set the port register PxDR and PxCR (x = 3,5) to 1. The PWM output
Three-phase PWM Output Unit
protective circuit (emergency stop and overload), and a dead time control circuit.
The three-phase PWM output unit consists of a pulse width modulation circuit, commutation control circuit,
Configuration of the three-phase PWM output unit
waveform mode, triangular wave modulation or sawtooth wave modulation can be selected by using the PMD
Control Register (MDCRA) bit 1. The PWM frequency is set by using the PMD Period Register (MDPRD).
The following shows the relationship between the value of this register and the PWM counter clock set by
the MDCRB Register, PWMCK.
with PWM period.
results from the waveform arithmetic circuit and by using the results as CMPU, V, W Register set value, it
outputs independent three-phase PWM waveforms. When the waveform calculation function is enabled by
the waveform arithmetic circuit and transfer of calculation results into the CMPU to W Registers is enabled
(with EDCRA Register bit 2), the CMPU to W Registers are disabled against writing.
results into the CMPU, V, W Registers is disabled (with EDCRA Register bit 4), the calculation results are
transferred to the buffers of CMPU, V, W Registers, but not output to the port.
circuit that have been input to a buffer. After changing the read calculation result data by software, writing
the changed data to the CMPU, V, and W registers enables an arbitrary waveform other than a sinusoidal
wave to be output. When the registers are read after writing, the values written to the registers are read out if
accessed before the calculation results are transferred after calculation is finished.
This circuit produces three-phase independent PWM waveforms with an equal PWM frequency. For PWM
The PMD Period Register (MDPRD) is comprised of dual-buffers, so that CMPU, V, W Register is updated
When the waveform arithmetic circuit is operating, the PWM waveform output unit receives calculation
When the waveform calculation function is enabled (with EDCRA Register bit 1) and transfer of calculation
Read-accessing the CMPU, V, and W registers can read the calculation results of the waveform arithmetic
Pulse width modulation circuit (PWM waveform generating unit)
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TMP88FW45AFG