tmp88fw45afg TOSHIBA Semiconductor CORPORATION, tmp88fw45afg Datasheet - Page 62

• Manufacturer Part Number: tmp88fw45afg
• Description: 8 Bit Microcontroller Tlcs-870/x Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

5.3
Port P2 (P22 to P20)
5.3
P2 Port Input/Output Registers
(00002H)
Note 1: OFDRST shows a reset signal of oscillation frequency detection.
this port as these functional pins or an input port, set the output latch to 1. When reset, the output latch is initialized
to 1.
using this port as an output port, note that the interrupt latch is set by a falling edge of output pulse. And note that
outputs on this port during STOP mode go to a high-impedance state even if SYSCR1<OUTEN> is set "1", because
P20 port is also used as STOP port.
any other instruction is executed, the external pin state is read out.
the oscillation frequency detection reset and Port P2 becomes high impedance.
P2DR
Port P2 (P22 to P20)
Port P2 is a 3-bit input/output port shared with external interrupt input and STOP mode release signal. When using
We recommend using the P20 pin as external interrupt input, STOP mode release signal input, or input port. When
When a read instruction is executed on P2 port, indeterminate values are read in from bits 7 to 3.
When any read-modify-write instruction is executed on P2 port, the content of the output latch is read out. When
If high frequency oscillation stops or becomes abnormal in NORMAL/IDLE mode, the TMP88FW45AFG generates
Note 1: When a read instruction is executed on P2 port, indeterminate values are read in from bits 7 to 3.
7
Control output
Control input
Control input
Data output
Data output
Data input
Data input
OFDRST
OFDRST
6
OUTEN
STOP
STOP
5
SET/CLR/CPL, etc
SET/CLR/CPL, etc
Output latch
Output latch
D
D
4
Q
Q
Figure 5-4 Port P2
3
Page 48
PWM4
PDO4
INT4
P22
TC4
2
P21
TC3
1
CMP/MCMP/TEST, etc
CMP/MCMP/TEST, etc
STOP
INT5
P20
0
Read/Write
(Initial value: **** *111)
P20
P21, P22
TMP88FW45AFG