tmp88fw45afg TOSHIBA Semiconductor CORPORATION, tmp88fw45afg Datasheet - Page 79
tmp88fw45afg
Manufacturer Part Number
tmp88fw45afg
Description
8 Bit Microcontroller Tlcs-870/x Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
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6. Time Base Timer (TBT) and Divider Output (DVO)
Example :Set the time base timer frequency to fc/2
6.1
timer interrupt (INTTBT).
of the timing generator which is selected by TBTCK. ) after time base timer has been enabled.
interrupt period ( Figure 6-2 ).
frequency must not be changed with the disable from the enable state.) Both frequency selection and enabling can be
performed simultaneously.
Time Base Timer
The time base timer generates time base for key scanning, dynamic displaying, etc. It also provides a time base
An INTTBT ( Time Base Timer Interrupt ) is generated on the first falling edge of source clock ( The divider output
The divider is not cleared by the program; therefore, only the first interrupt may be generated ahead of the set
The interrupt frequency (TBTCK) must be selected with the time base timer disabled (TBTEN="0"). (The interrupt
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
23
21
16
14
13
12
11
9
,fc/2
,fc/2
,fc/2
,fc/2
,fc/2
,fc/2
,fc/2
,fc/2
LD
LD
DI
SET
EI
24
22
17
15
14
13
12
10
Source clock
TBTCR<TBTEN>
INTTBT
interrupt request
TBTCK
Time base timer control register
Figure 6-1 Time Base Timer configuration
MPX
(TBTCR) , 00000010B
(TBTCR) , 00001010B
(EIRL) . 6
3
Figure 6-2 Time Base Timer Interrupt
TBTCR
Source clock
Enable TBT
16
[Hz] and enable an INTTBT interrupt.
TBTEN
Page 65
Falling edge
detector
Interrupt period
; TBTCK ← 010 (Freq. set)
; TBTEN ← 1 (TBT enable)
INTTBT
interrupt request
TMP88FW45AFG
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