se97b NXP Semiconductors, se97b Datasheet - Page 23

• Manufacturer Part Number: se97b
• Description: Ddr Memory Module Temp Sensor With Integrated Spd
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 10.
SE97B_1
Product data sheet
Bit
Symbol
Default
Access
Bit
Symbol
Default
Access
CAP - Capability register (address 00h) bit allocation
EVSD
8.2 CAP — Capability register (00h, 16-bit read-only)
15
R
0
R
7
1
Table 11.
Bit
15:8
7
6
5
4:3
2
1
0
TMOUT
14
R
0
R
6
1
Symbol
RFU
EVSD
TMOUT
VHV
TRES
WRNG
HACC
BCAP
Capability register (address 00h) bit description
VHV
13
R
0
R
5
1
Rev. 01 — 27 January 2010
Description
Reserved for future use; must be zero.
EVENT with shutdown action.
Remark: Bit 7 follows the state of SMBUS[4] which can change
EVENT output to freeze.
operation. Note that bus time-out support is operational in shutdown
mode, or for access to the EEPROM portion of the device.
High voltage standoff for pin A0.
Temperature resolution.
Wider range.
Higher accuracy (set during manufacture).
Basic capability.
Bus time-out period for thermal sensor access during normal
0 — The EVENT output freezes in its current state when entering
shutdown. Upon exiting shutdown, the EVENT output remains in the
previous state until the next thermal sample is taken.
1 (default) — The EVENT output is de-asserted (not driven) when
entering shutdown, and remains de-asserted upon exit from
shutdown until the next thermal sample is taken.
1 — Parameter t
35 ms (SMBus compatible).
1 — Supports a voltage up to 10 V on the A0 pin.
10 — 0.125 °C LSB (11-bit)
1 — can read temperatures below 0 °C and set sign bit accordingly
1 — B grade accuracy
1 — has Alarm and Critical Trips interrupt capability
DDR memory module temp sensor with integrated SPD
TRES
12
R
0
R
4
1
RFU
to(SMBus)
TRES
11
R
0
R
3
0
is supported within the range of 25 ms to
WRNG
10
R
0
R
2
1
HACC
R
9
0
R
1
1
© NXP B.V. 2010. All rights reserved.
SE97B
BCAP
R
8
0
R
0
1
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