se97b NXP Semiconductors, se97b Datasheet - Page 9

• Manufacturer Part Number: se97b
• Description: Ddr Memory Module Temp Sensor With Integrated Spd
• Manufacturer: NXP Semiconductors

NXP Semiconductors
SE97B_1
Product data sheet
7.3.2.1 Alarm window
7.3.2.2 Critical trip
7.3.2 EVENT thresholds
The device provides a comparison window with an UPPER trip point and a LOWER trip
point, programmed through the Upper Boundary Alarm Trip register (02h), and Lower
Boundary Alarm Trip register (03h). The Upper Boundary Alarm Trip register holds the
upper temperature trip point, while the Lower Boundary Alarm Trip register holds the lower
temperature trip point as modified by hysteresis as programmed in the Configuration
register. When enabled, the EVENT output triggers whenever entering or exiting (crossing
above or below) the alarm window.
The Upper Boundary Alarm Trip should always be set above the Lower Boundary Alarm
Trip.
The alarm window limit is immediately compared with the temperature register even if it
has not been recently updated (e.g., device has been in standby) when the EVENT is
turned on (CONFIG[3]).
Consider waiting one conversion cycle (125 ms) after setting the alarm window limit
before enabling the EVENT output/comparing the alarm window limit with the temperature
register to ensure that there is correct data in the temperature register.
If SMBUS[2] is set, then the alarm window limit will only be compared to the Temperature
register after it has been updated when EVENT is turned on.
The T
modified by hysteresis as programmed in the Configuration register. When the
temperature reaches the critical temperature value in this register (and EVENT is
enabled), the EVENT output asserts and cannot be de-asserted until the temperature
drops below the critical temperature threshold. The Event cannot be cleared through the
clear EVENT bit or SMBus Alert.
The Critical Alarm Trip should always be set above the Upper Boundary Alarm Trip.
The critical trip limit is immediately compared with the temperature register even if it has
not been recently updated (e.g., device has been in standby) when the EVENT is turned
on (CONFIG[3]).
Consider waiting one conversion cycle (125 ms) after setting the critical trip limit before
enabling the EVENT output/comparing the critical trip limit with the temperature register to
ensure that there is correct data in the temperature register.
If SMBUS[2] is set, then the alarm window limit will only be compared to the Temperature
register after it has been updated when EVENT is turned on.
•
Advisory note:
– NXP device: The EVENT output can be cleared through the clear EVENT bit or
– Competitor device: The EVENT output can be cleared only through the clear
– Work-around: Only clear EVENT output using the EVENT bit if both NXP and
th(crit)
SMBus Alert Response Address (ARA).
EVENT bit.
competitor devices are used.
temperature setting is programmed in the Critical Alarm Trip register (04h) as
Rev. 01 — 27 January 2010
DDR memory module temp sensor with integrated SPD
© NXP B.V. 2010. All rights reserved.
SE97B
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