se97b NXP Semiconductors, se97b Datasheet - Page 26

• Manufacturer Part Number: se97b
• Description: Ddr Memory Module Temp Sensor With Integrated Spd
• Manufacturer: NXP Semiconductors

NXP Semiconductors
SE97B_1
Product data sheet
Table 13.
Bit
3
2
1
0
Symbol
EOCTL
CVO
EP
EMD
Configuration register (address 01h) bit description
Description
EVENT Output Control.
When either of the Critical Trip or Alarm Window lock bits is set, this bit
cannot be altered until unlocked.
Critical Event Only.
When the alarm window lock bit is set, this bit cannot be altered until
unlocked.
EVENT Polarity.
When the EP (EVENT Polarity) bit is changed, the EVENT output would
immediately change state on the SE97B. A new Shutdown mode has been
added on the SE97B with two states defined by the SMBus register
EventSleepState = 0. Freeze state of EVENT output and
EventSleepState = 1: de-asserted state of EVENT output. So now if the EP
bit changes, the EVENT output state will change immediately even during
shutdown. It will not wait for the part to do a new temperature conversion
after coming out of shutdown. Changes to all other bits in the CONFIG
register and the SMBus register take effect after a new temperature
conversion happens when the part comes out of shutdown. The EP bit is not
related to temperature conversion or readings or if the part is in shutdown or
active.
Remark: In Shutdown mode, when DisableTimeout = 1 or if
DisableTimeout = 0 and Enable SDIO = 0, the EVENT Polarity bit will not
take effect immediately, but will updated after it comes out of shutdown.
EVENT Mode.
cannot be altered until unlocked.
When either of the Critical Trip or Alarm Window lock bits is set, this bit
0 — EVENT output disabled (default)
1 — EVENT output enabled
0 — EVENT output on Alarm or Critical temperature event (default)
1 — EVENT only if temperature is above the value in the critical
temperature register
0 — active LOW (default)
1 — active HIGH. When either of the Critical Trip or Alarm Window lock
bits is set, this bit cannot be altered until unlocked.
0 — comparator output mode (default)
1 — interrupt mode
Rev. 01 — 27 January 2010
DDR memory module temp sensor with integrated SPD
…continued
© NXP B.V. 2010. All rights reserved.
SE97B
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