k4j55323qg Samsung Semiconductor, Inc., k4j55323qg Datasheet - Page 2

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k4j55323qg

Manufacturer Part Number
k4j55323qg
Description
256mbit Gddr3 Sdram
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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Revision History
K4J55323QG
Revision
0.0
0.1
0.2
0.3
0.4
1.0
1.1
1.2
1.3
November
February
Month
March
March
March
June
June
April
May
2005
2005
2005
2005
2005
2005
2005
2006
2006
Year
- Target Spec
- Changed EMRS table for Driver Impedance control.
- Typo corrected.
- Added clock frequency change sequence on page 18 and IBIS spec on page 19~21
- Reduced Cin min. value on page 54.
- Added note for RFM pin on page 4.
- Modified input functional description for CK/CK and Vref on page 5.
- Removed -BC10/11 from the spec. Accordingly, CL12~15 become "reserved" in MRS table.
- Modified note description for RMF on page 4.
- Modified input functional description for Mirror function on page 5.
- Modified note description for the Write Latency on page 55.
- Clarify RMF description on page 4,5 to avoid confusion in case of using same board for both
- Added note description for Boundary scan function on page 22,23.
- Typo corrected.
- Finalized DC characteristics and IBIS specification
- Changed tRFC of -BC16 from 33tCK to 31tCK effective date code with WW0543
- Removed AL option on EMRS table on page 14 .
- Changed minimum delay from a read w/AP to write or write w/AP on page 44.
- Added comment on page 23.
512Mb and 256Mb GDDR3.
(one RFM ball in the scan oder will be read as a logic "0")
- 2 /53 -
History
256M GDDR3 SDRAM
Rev. 1.3 June 2006

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