ADC1443D125HD IDT [Integrated Device Technology], ADC1443D125HD Datasheet - Page 23
![no-image](/images/no-image-200.jpg)
ADC1443D125HD
Manufacturer Part Number
ADC1443D125HD
Description
Dual channel 14-bit ADC; 125, 160 or 200 Msps; JESD204B serial outputs
Manufacturer
IDT [Integrated Device Technology]
Datasheet
1.ADC1443D125HD.pdf
(49 pages)
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Integrated Device Technology
ADC1443D_SER
Objective data sheet
11.2.1 Drive modes
11.2 Clock input
The configuration shown in Figure 30 is recommended for high-frequency applications. In
both cases, the choice of transformer is a compromise between cost and performance.
The ADC1443D series can be driven differentially (LVPECL, LVDS or SINE). A
single-ended LVCMOS signal connected to either pin CLKP or pin CLKM can also drive
the device (connect the complementary pin to ground using a capacitor). The LVPECL is
recommended for an optimal performance.
Fig 30. Dual transformer configuration (high IF)
Fig 31. LVPECL/LVDS differential clock input
analog
input
Dual 14-bit ADC; 125, 160 or 200 Msps; JESD204A/B serial outputs
100 nF
Rev. 03 — 19 July 2012
100 nF
LVPECL / LVDS
clock input
100 nF
50 Ω
50 Ω
ADC1443D series
001aan475
CLKM
CLKP
50 Ω
50 Ω
10 Ω
10 Ω
001aan666
3.9 pF
100 nF
VCMx
INxM
INxP
© IDT 2012. All rights reserved.
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