ADC1443D125HD IDT [Integrated Device Technology], ADC1443D125HD Datasheet - Page 44

• Manufacturer Part Number: ADC1443D125HD
• Description: Dual channel 14-bit ADC; 125, 160 or 200 Msps; JESD204B serial outputs
• Manufacturer: IDT [Integrated Device Technology]

Integrated Device Technology
Table 48.
Default settings are shown highlighted.
Table 49.
Default settings are shown highlighted.
Table 50.
Default settings are shown highlighted.
ADC1443D_SER
Objective data sheet
Bit
Bit
7 to 3
2 to 0
Bit
7 to 5
4 to 3
2
1
0
Symbol
Symbol
RESERVED[4:0]
SWING[2:0]
Symbol
RESERVED[2:0]
LANE_MODE[1:0]
LANE_POL
RESERVED
LANE_PD
IP_OUTBUF00_SWING register (address 086Bh) bit description
IP_OUTBUF01_SWING register (address 086Ch) bit description
IP_LANE00_0_CTRL register (address 0871h) bit description
Access
Access
R/W
R/W
Access
R/W
R/W
R/W
R/W
R/W
Dual 14-bit ADC; 125, 160 or 200 Msps; JESD204A/B serial outputs
Rev. 03 — 19 July 2012
Value
011
100
101
110
111
Value
00000
000
001
010
011
100
101
110
111
Value
00
0
0
*
000
Description
Description
reserved
Configurable lane 1 output current
Description
reserved
debug option directly before serializer
if set to logic 1, lane P/N polarity is inverted
reserved
if set to logic 1, lane enters power-down
18 mA; 450 mV (p-p)
20 mA; 500 mV (p-p)
22 mA; 550 mV (p-p)
24 mA; 600 mV (p-p)
26 mA; 650 mV (p-p)
12 mA; 300 mV (p-p)
14 mA; 350 mV (p-p)
16 mA; 400 mV (p-p)
18 mA; 450 mV (p-p)
20 mA; 500 mV (p-p)
22 mA; 550 mV (p-p)
24 mA; 600 mV (p-p)
26 mA; 650 mV (p-p)
0: normal mode, ADC path
1: toggle (0/1 toggle sent over the lanes)
2: A constant (value in IP_DEBUG_OUT) is sent
over the lanes
3: PRBS polynom is sent over the lane
…continued
ADC1443D series
© IDT 2012. All rights reserved.
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