ADC1443D125HD IDT [Integrated Device Technology], ADC1443D125HD Datasheet - Page 36

• Manufacturer Part Number: ADC1443D125HD
• Description: Dual channel 14-bit ADC; 125, 160 or 200 Msps; JESD204B serial outputs
• Manufacturer: IDT [Integrated Device Technology]

Integrated Device Technology
Table 20.
Default settings are shown highlighted.
Table 21.
Default settings are shown highlighted.
Table 22.
Default settings are shown highlighted.
[1]
Table 23.
Default settings are shown highlighted.
ADC1443D_SER
Objective data sheet
Bit
7 to 0
Bit
7
6 to 0
Bit
7 to 2
1 to 0
Bit
7 to 5
4
3
Local register.
Symbol
SW_RST
Symbol
SW_RST
-
Symbol
-
OP_MODE[1:0]
Symbol
-
SE_SEL
DIFF_SE
CHIP_RESET register (address 0000h) bit description
CHIP_RESET register (address 0005h) bit description
OP_MODE register (address 0006h) bit description
CLK_CFG register (address 0007h) bit description
11.5.3.1 ADC control registers
11.5.3 Detailed register description
The tables in this section contain detailed descriptions of the registers.
[1]
Access
R/W
Access
R/W
-
Access
-
R/W
Access
-
R/W
R/W
Dual 14-bit ADC; 125, 160 or 200 Msps; JESD204A/B serial outputs
Rev. 03 — 19 July 2012
Value
-
Value
0
1
-
Value
-
00
01
10
11
Value
-
0
1
0
1
Description
resets global and local registers for any value “1”
written at any bit (autoclear).
Description
resets global and local registers
not used
Description
not used
operating mode for the selected channel
Description
not used
single-ended clock input pin selection
differential/single-ended clock input selection
no reset
performs a reset to the default values (autoclear)
normal (power-up)
power-down
sleep
not used
CLKP
CLKM
fully differential
single-ended
ADC1443D series
© IDT 2012. All rights reserved.
36 of 49