ADC1443D125HD IDT [Integrated Device Technology], ADC1443D125HD Datasheet - Page 37

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ADC1443D125HD

Manufacturer Part Number
ADC1443D125HD
Description
Dual channel 14-bit ADC; 125, 160 or 200 Msps; JESD204B serial outputs
Manufacturer
IDT [Integrated Device Technology]
Datasheet
Integrated Device Technology
Table 23.
Default settings are shown highlighted.
Table 24.
Default settings are shown highlighted.
[1]
Table 25.
Default settings are shown highlighted.
Table 26.
Default settings are shown highlighted.
ADC1443D_SER
Objective data sheet
Bit
2 to 0
Bit
7 to 3
2 to 0
Bit
7 to 2
1
0
Bit
7 to 3
2
Local register
Symbol
CLK_DIV[1:0]
Symbol
-
INTREF[2:0]
Symbol
-
ADC_B
ADC_A
Symbol
-
DATA_SWAP
INTERNAL_REF register (address 0008h) bit description
CLK_CFG register (address 0007h) bit description
CHANNEL_SEL register (address 0009h) bit description
OUTPUT_CFG register (address 0011h) bit description
[1]
[1]
Access
R/W
Access
-
R/W
Access
-
R/W
R/W
Access
-
R/W
Dual 14-bit ADC; 125, 160 or 200 Msps; JESD204A/B serial outputs
Rev. 03 — 19 July 2012
Value
000
001
010
011
100
101
110
111
Value
-
-
Value
-
0
1
0
1
Value
-
0
1
…continued
Description
clock divider selection
Description
not used
see Table 10
Description
not used
channel B selection for next SPI operation in local
registers
channel A selection for next SPI operation in local
registers
Description
not used
output data bits swapped
divide by 1
divide by 2
divide by 3
divide by 4
divide by 5
divide by 6
divide by 7
divide by 8
not selected
selected
not selected
selected
no swapping
MSBs swapped with LSBs
ADC1443D series
© IDT 2012. All rights reserved.
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