MC68HC908AB32 MOTOROLA [Motorola, Inc], MC68HC908AB32 Datasheet - Page 111

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MC68HC908AB32

Manufacturer Part Number
MC68HC908AB32
Description
HCMOS Microcontroller Unit
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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MC68HC908AB32
MOTOROLA
PIN LOGIC
RESET
Signal Name
CGMXCLK
CGMVCLK
CGMOUT
PORRST
IRST
R/W
IAB
IDB
Rev. 1.0
SIM RESET STATUS REGISTER
Buffered version of OSC1 from clock generator module (CGM)
PLL output
PLL-based or OSC1-based clock output from CGM module
(Bus clock = CGMOUT divided by two)
Internal address bus
Internal data bus
Signal from the power-on reset module to the SIM
Internal reset signal
Read/write signal
RESET PIN CONTROL
Freescale Semiconductor, Inc.
POR CONTROL
AND PRIORITY DECODE
STOP/WAIT
Table 8-1. Signal naming conventions
INTERRUPT CONTROL
CONTROL
CONTROL
For More Information On This Product,
CLOCK
Figure 8-1. SIM Block Diagram
System Integration Module (SIM)
Go to: www.freescale.com
CLOCK GENERATORS
RESET
COUNTER
SIM
2
CONTROL
MASTER
RESET
Description
MODULE STOP
MODULE WAIT
CPU STOP (FROM CPU)
CPU WAIT (FROM CPU)
SIMOSCEN (TO CGM)
COP CLOCK
CGMXCLK (FROM CGM)
CGMOUT (FROM CGM)
INTERNAL CLOCKS
LVI (FROM LVI MODULE)
ILLEGAL OPCODE (FROM CPU)
ILLEGAL ADDRESS (FROM ADDRESS
MAP DECODERS)
COP (FROM COP MODULE)
CPU INTERFACE
INTERRUPT SOURCES
System Integration Module (SIM)
Technical Data
Introduction
111

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