MC68HC908AB32 MOTOROLA [Motorola, Inc], MC68HC908AB32 Datasheet - Page 362
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MC68HC908AB32
Manufacturer Part Number
MC68HC908AB32
Description
HCMOS Microcontroller Unit
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AB32.pdf
(392 pages)
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Low-Voltage Inhibit (LVI)
21.5 LVI Status Register (LVISR)
21.6 LVI Interrupts
Technical Data
362
Address:
Reset:
The LVI status register flags V
LVIOUT — LVI Output Bit
The LVI module does not generate interrupt requests.
Read: LVIOUT
Write:
LVI
This read-only flag becomes set when V
voltage for 32 to 40 CGMXCLK cycles. (See
clears the LVIOUT bit.
Freescale Semiconductor, Inc.
TRIPF
For More Information On This Product,
$FE0F
V
V
V
V
Bit 7
DD
DD
DD
DD
0
At level:
> LVI
V
LVI
LVI
LVI
Go to: www.freescale.com
Figure 21-3. LVI Status Register (LVISR)
DD
Low-Voltage Inhibit (LVI)
= Unimplemented
TRIPR
TRIPF
TRIPF
TRIPF
LVI
6
0
0
Table 21-1. LVIOUT Bit Indication
TRIPR
V
5
0
0
DD
For number of CGMXCLK
32 to 40 CGMXCLK cycles
DD
< 32 CGMXCLK cycles
> 40 CGMXCLK cycles
voltages below the LVI
4
0
0
cycles:
Any
Any
3
0
0
DD
falls below the LVI
MC68HC908AB32
Table 21-1
2
0
0
TRIPF
Previous value
1
0
0
.) Reset
LVIOUT
0 or 1
MOTOROLA
level
0
0
1
—
TRIPF
Rev. 1.0
Bit 0
.
0
0
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