MC68HC908AB32 MOTOROLA [Motorola, Inc], MC68HC908AB32 Datasheet - Page 134
MC68HC908AB32
Manufacturer Part Number
MC68HC908AB32
Description
HCMOS Microcontroller Unit
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AB32.pdf
(392 pages)
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Clock Generator Module (CGM)
9.4.1 Crystal Oscillator Circuit
Technical Data
134
Addr.
$001C
$001D
$001E
PLL Bandwidth Control
Register Name
PLL Control Register
PLL Programming
Register
Register
(PBWC)
(PCTL)
(PPG)
The crystal oscillator circuit consists of an inverting amplifier and an
external crystal. The OSC1 pin is the input to the amplifier and the OSC2
pin is the output. The SIMOSCEN signal from the system integration
module (SIM) enables the crystal oscillator circuit.
The CGMXCLK signal is the output of the crystal oscillator circuit and
runs at a rate equal to the crystal frequency. CGMXCLK is then buffered
to produce CGMRCLK, the PLL reference clock.
CGMXCLK can be used by other modules which require precise timing
for operation. The duty cycle of CGMXCLK is not guaranteed to be 50%
and depends on external factors, including the crystal and related
external components.
An externally generated clock can also feed the OSC1 pin of the crystal
oscillator circuit. For this configuration, the external clock should be
connected to the OSC1 pin and the OSC2 pin allowed to float.
Reset:
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
Freescale Semiconductor, Inc.
Figure 9-2. CGM I/O Register Summary
For More Information On This Product,
PLLIE
AUTO
Bit 7
MUL7
0
0
0
Clock Generator Module (CGM)
Go to: www.freescale.com
= Unimplemented
LOCK
MUL6
PLLF
6
0
0
1
PLLON
MUL5
ACQ
5
1
0
1
MUL4
BCS
XLD
4
0
0
0
VRS7
3
1
1
0
0
0
MC68HC908AB32
VRS6
2
1
1
0
0
1
VRS5
1
1
1
0
0
1
MOTOROLA
—
Rev. 1.0
Bit 0
VRS4
1
1
0
0
0
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