MC68HC908AB32 MOTOROLA [Motorola, Inc], MC68HC908AB32 Datasheet - Page 355

• Manufacturer Part Number: MC68HC908AB32
• Description: HCMOS Microcontroller Unit
• Manufacturer: MOTOROLA [Motorola, Inc]

20.4 I/O Signals
20.4.1 CGMXCLK
20.4.2 STOP Instruction
20.4.3 COPCTL Write
20.4.4 Power-On Reset
MC68HC908AB32
MOTOROLA
NOTE:
—
Rev. 1.0
A COP reset pulls the RST pin low for 32 CGMXCLK cycles and sets the
COP bit in the SIM reset status register (SRSR).
In monitor mode, the COP is disabled if the RST pin or the IRQ is held
at V
Place COP clearing instructions in the main program and not in an
interrupt subroutine. Such an interrupt subroutine could keep the COP
from generating a reset even while the main program is not working
properly.
The following paragraphs describe the signals shown in
CGMXCLK is the crystal oscillator output signal. CGMXCLK frequency
is equal to the crystal frequency.
The STOP instruction clears the COP prescaler.
Writing any value to the COP control register (COPCTL)
Control
of the prescaler. Reading the COP control register returns the low byte
of the reset vector.
The power-on reset (POR) circuit clears the COP prescaler 4096
CGMXCLK cycles after power-up.
Freescale Semiconductor, Inc.
TST
For More Information On This Product,
During the break state, V
Computer Operating Properly (COP)
Register) clears the COP counter and clears bits 12 through 5
Go to: www.freescale.com
TST
on the RST pin disables the COP.
Computer Operating Properly (COP)
(see 20.5 COP
Figure
Technical Data
I/O Signals
20-1.
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