MC68HC908AB32 MOTOROLA [Motorola, Inc], MC68HC908AB32 Datasheet - Page 161
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MC68HC908AB32
Manufacturer Part Number
MC68HC908AB32
Description
HCMOS Microcontroller Unit
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AB32.pdf
(392 pages)
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10.4.2 Data Format
MC68HC908AB32
MOTOROLA
—
Rev. 1.0
Table 10-2
monitor mode.
Communication with the monitor ROM is in standard non-return-to-zero
(NRZ) mark/space data format. (See
The data transmit and receive rate can be anywhere from 4800 baud to
28.8 k-baud. Transmit and receive baud rates must be identical.
Notes:
Monitor
1. If the high voltage (V
BREAK
Modes
User
START
Freescale Semiconductor, Inc.
$A5
asserts its COP enable output. The COP can be enabled or disabled by the COPD bit in
the configuration register 1 (CONFIG1). (See
BIT
For More Information On This Product,
START
START
BIT
BIT
BIT 0
Disabled
Enabled
is a summary of the differences between user mode and
Go to: www.freescale.com
COP
BIT 0
BIT 0
Figure 10-3. Sample Monitor Waveforms
BIT 1
Monitor ROM (MON)
(1)
Figure 10-2. Monitor Data Format
BIT 1
BIT 1
TST
Table 10-2. Mode Differences
BIT 2
Vector
$FEFE
$FFFE
) is removed from the IRQ pin while in monitor mode, the SIM
Reset
High
BIT 2
BIT 2
BIT 3
BIT 3
BIT 3
Vector
$FEFF
$FFFF
Reset
Low
BIT 4
BIT 4
BIT 4
Functions
Figure 10-2
23.6 5.0-V DC Electrical
BIT 5
$FEFC
Vector
$FFFC
Break
High
BIT 5
BIT 5
BIT 6
BIT 6
BIT 6
$FEFD
Vector
$FFFD
Break
Low
BIT 7
and
BIT 7
BIT 7
Functional Description
Monitor ROM (MON)
Figure
STOP
Vector
$FFFC
$FEFC
STOP
STOP
BIT
BIT
BIT
High
SWI
Characteristics.)
Technical Data
START
START
NEXT
NEXT
BIT
BIT
10-3.)
Vector
$FFFD
$FEFD
Low
SWI
161
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