HYB18T512160AC-37 INFINEON [Infineon Technologies AG], HYB18T512160AC-37 Datasheet - Page 12

• Manufacturer Part Number: HYB18T512160AC-37
• Description: 512-Mbit Double-Data-Rate-Two SDRAM
• Manufacturer: INFINEON [Infineon Technologies AG]

Table 3
Ball#/Pin#
E1, J9, M9, R1
E7, F2, F8, H2,
H8
J7
J3,N1,P9
Not Connected 4/ 8 organizations
L3,L7, G1
Not Connected 4 organization
A2, B1, B9,
D1, D9
Not Connected 16 organization
A2, E2, L1, R3,
R7, R8
Other Pins 4/ 8 organizations
F9
Other Pins 16 organization
K9
Table 4
Abbreviation
I
O
I/O
AI
PWR
GND
NC
Table 5
Abbreviation
SSTL
LV-CMOS
OD
Data Sheet
CMOS
Pin Configuration of DDR SDRAM
Abbreviations for Pin Type
Abbreviations for Buffer Type
Name
V
V
V
V
NC
NC
NC
ODT
ODT
DD
SSQ
SSDL
SS
Pin
Type
PWR
PWR
PWR
PWR
NC
NC
NC
–
–
Description
Standard input-only pin. Digital levels.
Output. Digital levels.
I/O is a bidirectional input/output signal.
Input. Analog levels.
Power
Ground
Not Connected
Description
Serial Stub Terminated Logic (SSTL_18)
Low Voltage CMOS
CMOS Levels
Open Drain. The corresponding pin has 2 operational states, active low and tristate, and
allows multiple devices to share as a wire-OR.
Buffer
Type
–
–
–
–
–
–
–
–
–
Function
Power Supply
Power Supply
Power Supply
Power Supply
Not Connected
Not Connected
Not Connected
On-Die Termination Control
On-Die Termination Control
12
512-Mbit Double-Data-Rate-Two SDRAM
HYB18T512[400/800/160]A[C/F]–[3.7/5]
09112003-SDM9-IQ3P
Rev. 1.13, 2004-05
Overview