HYB18T512160AC-37 INFINEON [Infineon Technologies AG], HYB18T512160AC-37 Datasheet - Page 69

• Manufacturer Part Number: HYB18T512160AC-37
• Description: 512-Mbit Double-Data-Rate-Two SDRAM
• Manufacturer: INFINEON [Infineon Technologies AG]

5.2
DDR2 SDRAM pin timing are specified for either single
ended or differential mode depending on the setting of
the EMRS(1) “Enable DQS” mode bit; timing
advantages of differential mode are realized in system
design. The method by which the DDR2 SDRAM pin
timing are measured is mode dependent. In single
ended mode, timing relationships are measured
Table 24
Symbol
V
V
V
V
Table 25
Symbol
V
V
SLEW
1) This timing and slew rate definition is valid for all single-ended signals except
2) Input waveform timing is referenced to the input signal crossing through the
3) The input signal minimum slew rate is to be maintained over the range from
4) AC timings are referenced with input waveforms switching from
Figure 63
Data Sheet
IH(dc)
IL(dc)
IH(ac)
IL(ac)
REF
SWING(max)
1.
range from
on the negative transitions.
DC & AC Logic Input Levels
Single-ended DC & AC Logic Input Levels
Single-ended AC Input Test Conditions
Single-ended AC Input Test Conditions Diagram
V
IH(dc)min
V
Falling Slew =
SWING(MAX)
Condition
Input reference voltage
Input signal maximum peak to peak swing
Input signal minimum slew rate
Parameter
DC input logic high
DC input low
AC input logic high
AC input low
to
Start of Falling Edge Input Timing
V
IL(ac)max
delta TF
V
IH (dc)
for falling edges as shown in
min - V
delta TF
IL(ac)
max
69
Start of Rising Edge Input Timing
relative to the rising or falling edges of DQS crossing at
V
are measured relative to the crosspoint of DQS and its
complement, DQS. This distinction in timing methods is
verified by design and characterization but not subject
to production test. In single ended mode, the DQS (and
RDQS) signals are internally disabled and don’t care.
Min.
V
–0.3
V
—
Figure 63
REF
V
REF
REF
delta TR
512-Mbit Double-Data-Rate-Two SDRAM
IL(ac)
. In differential mode, these timing relationships
HYB18T512[400/800/160]A[C/F]–[3.7/5]
+ 0.125
+ 0.250
to
Rising Slew =
V
IH(ac)
V
V
Value
0.5
1.0
1.0
on the positive transitions and
t
REF
IL(dc)max
IS
,
t
level applied to the device under test.
x
IH
V
V
,
AC & DC Operating Conditions
t
IH(ac)
DDQ
DS
to
Max.
V
V
—
V
DDQ
REF
REF
,
V
t
DH
IH(ac)min
min - V
– 0.125
– 0.250
+ 0.3
.
delta TR
V
V
V
V
V
V
V
DDQ
IH(ac)
IH(dc)
REF
IL(dc)
IL(ac)
SS
09112003-SDM9-IQ3P
for rising edges and the
IL(dc)
Units
V
V
V / ns
Rev. 1.13, 2004-05
max
max
min
min
max
V
IH(ac)
V
V
V
V
Units
Notes
1)2)
1)2)
3)4)
to
V
IL(ac