AGL015 MICROSEMI [Microsemi Corporation], AGL015 Datasheet - Page 105

• Manufacturer Part Number: AGL015
• Description: IGLOO Low Power Flash FPGAs with Flash*Freeze Technology
• Manufacturer: MICROSEMI [Microsemi Corporation]

Figure 2-18 • Input Register Timing Diagram
Table 2-157 • Input Data Register Propagation Delays
Enable
Data
Preset
Clear
Out_1
Parameter
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Note:
CLK
ICLKQ
ISUD
IHD
ISUE
IHE
ICLR2Q
IPRE2Q
IREMCLR
IRECCLR
IREMPRE
IRECPRE
IWCLR
IWPRE
ICKMPWH
ICKMPWL
For specific junction temperature and voltage supply levels, refer to
Input Register
Timing Characteristics
Commercial-Case Conditions: T
Clock-to-Q of the Input Data Register
Data Setup Time for the Input Data Register
Data Hold Time for the Input Data Register
Enable Setup Time for the Input Data Register
Enable Hold Time for the Input Data Register
Asynchronous Clear-to-Q of the Input Data Register
Asynchronous Preset-to-Q of the Input Data Register
Asynchronous Clear Removal Time for the Input Data Register
Asynchronous Clear Recovery Time for the Input Data Register
Asynchronous Preset Removal Time for the Input Data Register
Asynchronous Preset Recovery Time for the Input Data Register
Asynchronous Clear Minimum Pulse Width for the Input Data Register
Asynchronous Preset Minimum Pulse Width for the Input Data Register
Clock Minimum Pulse Width High for the Input Data Register
Clock Minimum Pulse Width Low for the Input Data Register
50%
1.5 V DC Core Voltage
50%
t
1
ISUE
t
IHE
50%
50%
t
ISUD
0
t
t
ICLKQ
IHD
50%
50%
50%
J
t
IWPRE
= 70°C, Worst-Case VCC = 1.425 V
t
IPRE2Q
Description
50%
50%
R ev i si o n 1 9
t
IRECPRE
50%
t
ICLR2Q
50%
t
IWCLR
50%
50%
50%
t
Table 2-6 on page 2-7
IRECCLR
IGLOO Low Power Flash FPGAs
50%
t
ICKMPWH
t
IREMPRE
50%
for derating values.
50%
t
ICKMPWL
Std.
0.42
0.47
0.00
0.67
0.00
0.79
0.79
0.00
0.24
0.00
0.24
0.19
0.19
0.31
0.28
50%
t
50%
IREMCLR
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2- 89