AGL015 MICROSEMI [Microsemi Corporation], AGL015 Datasheet - Page 90

• Manufacturer Part Number: AGL015
• Description: IGLOO Low Power Flash FPGAs with Flash*Freeze Technology
• Manufacturer: MICROSEMI [Microsemi Corporation]

IGLOO DC and Switching Characteristics
Table 2-127 • Minimum and Maximum DC Input and Output Levels
Table 2-128 • Minimum and Maximum DC Input and Output Levels
Table 2-129 • Minimum and Maximum DC Input and Output Levels
2- 74
1.2 V
LVCMOS
Drive
Strength
Notes:
1. IIL is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
2. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
3. Currents are measured at 100°C junction temperature and maximum voltage.
4. Currents are measured at 85°C junction temperature.
5. Software default selection highlighted in gray.
1.2 V
LVCMOS
Drive
Strength
2 mA
Notes:
1. IIL is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
2. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
3. Currents are measured at 100°C junction temperature and maximum voltage.
4. Currents are measured at 85°C junction temperature.
5. Software default selection highlighted in gray.
1.2 V
LVCMOS
Drive
Strength
1 mA
Notes:
1. IIL is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
2. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
3. Currents are measured at 100°C junction temperature and maximum voltage.
4. Currents are measured at 85°C junction temperature.
5. Software default selection highlighted in gray.
2 mA
larger when operating outside recommended ranges
larger when operating outside recommended ranges
larger when operating outside recommended ranges
Min.
–0.3
Min.
–0.3 0.35 * VCCI 0.65 * VCCI
Min.
1.2 V LVCMOS (JESD8-12A)
Low-Voltage CMOS for 1.2 V complies with the LVCMOS standard JESD8-12A for general purpose 1.2 V
applications. It uses a 1.2 V input buffer and a push-pull output buffer. Furthermore, all LVCMOS 1.2 V
software macros comply with LVCMOS 1.2 V wide range as specified in the JESD8-12A
specification.
–0.3
V
Applicable to Advanced I/O Banks
V
Applicable to Standard Plus I/O Banks
Applicable to Standard I/O Banks
V
VIL
0.35 * VCCI 0.65 * VCCI
VIL
VIL
0.35 * VCCI 0.65 * VCCI
Max.
Max.
Max.
V
V
V
Min.
Min.
Min.
V
V
V
VIH
VIH
VIH
Max.
Max.
1.26
1.26
Max.
3.6
V
V
V
0.25 * VCCI 0.75 * VCCI
0.25 * VCCI 0.75 * VCCI
0.25 * VCCI 0.75 * VCCI 1
R ev i sio n 1 9
Max.
VOL
Max.
VOL
Max.
VOL
V
V
V
VOH
VOH
Min.
VOH
Min.
Min.
V
V
V
IOL IOH IOSH
mA mA
mA mA
IOL IOH IOSH
mA mA
I
OL
2
2
IOH IOSH
1
2
2
Max.
Max.
Max.
mA
TBD
mA
TBD
mA
TBD
3
3
3
IOSL IIL
IOSL IIL
Max.
Max.
IOSL IIL
mA
Max.
mA
TBD
TBD
mA
TBD
3
3
3
µA
µA
µA
10 10
10 10
10 10
1
1
4
4
1
4
IIH
µA
IIH
µA
µA
IIH
2
4
2
4
2
4