AGL015 MICROSEMI [Microsemi Corporation], AGL015 Datasheet - Page 241
AGL015
Manufacturer Part Number
AGL015
Description
IGLOO Low Power Flash FPGAs with Flash*Freeze Technology
Manufacturer
MICROSEMI [Microsemi Corporation]
Datasheet
1.AGL015.pdf
(248 pages)
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Manufacturer
Quantity
Price
Company:
Part Number:
AGL015V5-QNG68I
Manufacturer:
Actel
Quantity:
135
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Revision / Version
DC & Switching, cont’d.
Revision 9 (Jul 2008)
Product Brief v1.1
DC and Switching
Characteristics
Advance v0.3
Revision 8 (Jun 2008)
DC and Switching
Characteristics
Advance v0.2
Table 2-49 · Minimum and Maximum DC Input and Output Levels for LVCMOS
3.3 V Wide Range
As a result of the Libero IDE v8.4 release, Actel now offers a wide range of core
voltage support. The document was updated to change 1.2 V / 1.5 V to 1.2 V to
1.5 V.
As a result of the Libero IDE v8.4 release, Actel now offers a wide range of core
voltage support. The document was updated to change 1.2 V / 1.5 V to 1.2 V to
1.5 V.
Tables have been updated to reflect default values in the software. The default I/O
capacitance is 5 pF. Tables have been updated to include the LVCMOS 1.2 V I/O
set.
DDR Tables have two additional data points added to reflect both edges for Input
DDR setup and hold time.
The power data table has been updated to match SmartPower data rather then
simulation values.
AGL015 global clock delays have been added.
Table 2-1 • Absolute Maximum Ratings
VMV parameters in one row. The word "output" from the parameter description for
VCCI and VMV, and table note 3 was added.
Table 2-2 • Recommended Operating Conditions
references to tables notes 4, 6, 7, and 8. VMV was added to the VCCI parameter
row, and table note 9 was added.
In
Temperature1, the maximum operating junction temperature was changed from
110° to 100°.
VMV was removed from
table title was modified to remove "as measured on quiet I/Os." Table note 2 was
revised to remove "estimated SSO density over cycles." Table note 3 was revised
to remove "refers only to overshoot/undershoot limits for simultaneous switching
I/Os.
The
Figure 2-2 • V2 Devices – I/O State as a Function of VCCI and VCC Voltage
Levels
EQ 2
end result changed.
The table notes for
IGLOO Flash*Freeze
Characteristics, IGLOO Sleep
(IDD) Characteristics, IGLOO Shutdown Mode
include PDC6 and PDC7. VCCI and VJTAG were removed from the statement
about IDD in the table note for
Characteristics, IGLOO Shutdown
Note 2 of
Mode1
and PDC7.
Table 2-3 • Flash Programming Limits – Retention, Storage, and Operating
"PLL Behavior at Brownout Condition" section
"
was updated. The temperature was changed to 100°C, and therefore the
is new.
was updated to include VCCPLL. Note 4 was updated to include PDC6
Table 2-12 • Quiescent Supply Current (IDD), No IGLOO Flash*Freeze
is new.
Table 2-9 • Quiescent Supply Current (IDD) Characteristics,
Changes (prior versioning system)
Mode*,
Table 2-4 • Overshoot and Undershoot Limits
Mode*, and
Table 2-10 • Quiescent Supply Current (IDD)
R ev i si o n 1 9
Table 2-11 • Quiescent Supply Current (IDD)
Mode.
was updated to combine the VCCI and
Table 2-11 • Quiescent Supply Current
were updated to remove VMV and
is new.
1
was updated to add
IGLOO Low Power Flash FPGAs
1. The
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