AGL015 MICROSEMI [Microsemi Corporation], AGL015 Datasheet - Page 238

• Manufacturer Part Number: AGL015
• Description: IGLOO Low Power Flash FPGAs with Flash*Freeze Technology
• Manufacturer: MICROSEMI [Microsemi Corporation]

Datasheet Information
5- 2
Revision
Revision 19
(continued)
July 2010
The formulas in the table notes for
Resistances
The row for 110°C was removed from
before
100°C.
revised to change 110° to 100°C. (SAR 26259).
The notes regarding drive strength in the
Default I/O Software Settings"
V LVCMOS Wide Range" section
that the minimum drive strength for the default software configuration when run in wide
range is ±100 µA. The drive strength displayed in software is supported in normal range
only. For a detailed I/V curve, refer to the IBIS models (SAR 25700).
The following sentence was deleted from the
uses a 5 V–tolerant input buffer and push-pull output buffer."
The values for F
Module" section
The following notes were removed from
Input and Output Levels
±5%
Differential input voltage
Table 2-189 • IGLOO CCC/PLL Specification
Specification
CCC/PLL core is generated by Mircosemi core generator software, not all delay values
of the specified delay increments are available (SAR 25705).
The following figures were deleted (SAR 29991). Reference was made to a new
application note,
Based cSoCs and FPGA
Figure 2-36 • Write Access after Write onto Same Address
Figure 2-37 • Read Access after Write onto Same Address
Figure 2-38 • Write Access after Read onto Same Address
The port names in the SRAM
tables,
revised to ensure consistency with the software names (SARs 29991, 30510).
The
Package names used in the
standards given in
The
The
The P3 function was revised in the
The
The
The versioning system for datasheets has been changed. Datasheets are assigned a
revision number that increments each time the datasheet is revised. The
Device Status" table
"Pin Descriptions"
"CS81"
"CS121"
"QN132"
"FG144"
Failure. The example in the associated paragraph was changed from 110°C to
Figure 2-38 • FIFO
Table 2-46 • I/O Input Rise Time, Fall Time, and Related I/O Reliability
pin table for AGL250 is new (SAR 22737).
were corrected (SAR 21348).
were updated. A note was added to both tables indicating that when the
pin table for AGL125 is new (SAR 22737).
pin table for AGL060 was added (SAR 33689)
pin table for AGL250 was added.
and
DDRIMAX
Simultaneous Read-Write Operations in Dual-Port SRAM for Flash-
Package Mechanical Drawings
indicates the status for each device in the device family.
"Output DDR Module" section
chapter has been added (SAR 21642).
(SAR 29428):
s,
and F
which covers these cases in detail (SAR 21770).
= ±350 mV
Reset, and the FIFO
"Package Pin Assignments" section
section,
DDOMAX
"Timing
tables were revised for clarification. They now state
"CS196"
R ev isio n 1 9
Changes
"3.3 V LVCMOS Wide Range" section
were updated in the tables in the
Table 2-45 • Duration of Short Circuit Event
Waveforms", SRAM
Table 2-41 • I/O Weak Pull-Up/Pull-Down
Table 2-147 • Minimum and Maximum DC
"Summary of I/O Timing Characteristics –
pin table for AGL250 (SAR 24800).
"2.5 V LVCMOS" section
and
"Timing Characteristics"
(SAR 27395).
(SAR 23919).
Table 2-190 • IGLOO CCC/PLL
"Timing Characteristics"
were revised to match
(SAR 24916): "It
tables were
"Input DDR
and
"IGLOO
was
"1.2
2-118
2-28,
2-94,
2-128
Page
2-115
2-47,
4-37,
2-37
2-40
2-77
2-56
2-97
2-82
4-14
4-45
N/A
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