AGL015 MICROSEMI [Microsemi Corporation], AGL015 Datasheet - Page 237

• Manufacturer Part Number: AGL015
• Description: IGLOO Low Power Flash FPGAs with Flash*Freeze Technology
• Manufacturer: MICROSEMI [Microsemi Corporation]

5 – Datasheet Information
List of Changes
Revision
Revision 19
(September 2011)
The following tables list critical changes that were made in each revision of the IGLOO datasheet.
CS121 was added to the product tables in the
section
Notes indicating that device/package support is TBD for AGL250-QN132 and
AGL060-FG144 have been removed (SAR 33689).
M1AGL400 was removed from the
discontinued in April 2009 (SAR 32450).
Dimensions for the QN48 package were added to
Sizes Dimensions
The Y security option and Licensed DPA Logo were added to the
Information"
covered by a DPA counter-measures license from Cryptography Research (SAR
32151).
The
revised to clarify that although no existing security measures can give an absolute
guarantee, Microsemi FPGAs implement the best security available in the industry
(SAR 32865).
The following sentence was removed from the
"In addition, extensive on-chip programming circuitry allows for rapid, single-voltage
(3.3 V) programming of IGLOO devices via an IEEE 1532 JTAG interface" (SAR
28756).
The
Values for VCCPLL at 1.2 V –1.5 V DC core supply voltage were revised in
Recommended Operating Conditions
The value for VPUMP operation was changed from "0 to 3.45 V" to "0 to 3.6 V" (SAR
25220).
The value for VCCPLL 1.5 V DC core supply voltage was changed from" 1.4 to 1.6 V" to
"1.425 to 1.575 V" (SAR 26551).
The notes in the table were renumbered in order of their appearance in the table (SAR
21869).
The temperature used in
the limits given in
maximum power allowed is thus 1.28 W. Formerly it was 1.71 W (SAR 26259).
Values for CS196, CS281, and QN132 packages were added to
Thermal Resistivities
Table 2-6 • Temperature and Voltage Derating Factors for Timing Delays (normalized to
TJ = 70°C, VCC = 1.425 V)
for Timing Delays (normalized to TJ = 70°C, VCC = 1.14 V)
the column for –20°C and shift the data over to correct columns (SAR 23041).
The tables in the
on IDD (SAR 24112).
"Specifying I/O States During Programming" section
"In-System Programming (ISP) and Security" section
section for AGL125 (SAR 22737). CS81 was added for AGL250 (SAR 22737).
section. The trademarked Licensed DPA Logo identifies that a product is
"Quiescent Supply Current" section
(SAR 30537).
Table 2-2 • Recommended Operating Conditions
(SARs 26228, 32301).
Table 2-8 • Power Supply State per Mode
EQ 2
and
was revised from 110°C to 100°C for consistency with
Table 2-7 • Temperature and Voltage Derating Factors
1
R ev i si o n 1 9
Changes
"I/Os Per Package1"
(SAR 22356).
"Advanced Architecture"
"IGLOO Low Power Flash FPGAs"
Table 1 • IGLOO FPGAs Package
were updated with revised notes
is new (SAR 21281).
and
were updated to remove
table. This device was
"Security" section
is new.
Table 2-5 • Package
"IGLOO Ordering
1
section:
. The resulting
Table 2-2 •
were
I
Page
I,
to
1-3
1-8
2-2
2-6
2-6
2-7
2-7
III
1-2
II
II
I
IV
5 -1