DS2153QN-A7/T&R Maxim Integrated, DS2153QN-A7/T&R Datasheet - Page 11

• Manufacturer Part Number: DS2153QN-A7/T&R
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS2153QN-A7/T&R

• Product: Framer
• Number Of Transceivers: 1
• Supply Current (max): 65 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: PLCC-44
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 5 V
• Supply Voltage - Max: 5.25 V
• Supply Voltage - Min: 4.8 V
• Part # Aliases: 90-2153Q-NT7

Table 4-1. Sync/Resync Criteria
RCR2: RECEIVE CONTROL REGISTER 2 (Address = 11 Hex)
MULTIFRAME
(MSB)
FRAME OR
Sa8S
SYMBOL
RSCLKM
LEVEL
RESE
Sa8S
Sa7S
Sa6S
Sa5S
Sa4S
CRC4
CAS
FAS
—
Sa7S
FAS present in frames N
and N + 2, and FAS not
present in frame N + 1.
Two valid MF alignment
words found within 8ms.
Valid MF alignment word
found and previous time slot
16 contains code other than
all 0s.
POSITION
RCR2.7
RCR2.6
RCR2.5
RCR2.4
RCR2.3
RCR2.2
RCR2.1
RCR2.0
SYNC CRITERIA
Sa6S
NAME AND DESCRIPTION
Sa8 Bit Select. Set to 1 to report the Sa8 bit at the RLINK pin;
set to 0 to not report the Sa8 bit.
Sa7 Bit Select. Set to 1to report the Sa7 bit at the RLINK pin;
set to 0 to not report the Sa7 bit.
Sa6 Bit Select. Set to 1 to report the Sa6 bit at the RLINK pin;
set to 0 to not report the Sa6 bit.
Sa5 Bit Select. Set to 1 to report the Sa5 bit at the RLINK pin;
set to 0 to not report the Sa5 bit.
Sa4 Bit Select. Set to 1 to report the Sa4 bit at the RLINK pin;
set to 0 to not report the Sa4 bit.
Receive Side SYSCLK Mode Select.
0 = if SYSCLK is 1.544MHz
1 = if SYSCLK is 2.048MHz
Receive Side Elastic Store Enable.
0=elastic store is bypassed
1=elastic store is enabled
Not Assigned. Should be set to 0 when written.
Sa5S
11 of 60
Three consecutive incorrect FAS received.
Alternate (RCR1.2 = 1) the above criteria
is met or three consecutive incorrect bit 2
of non-FAS received.
915 or more CRC4 codewords out of 1000
received in error.
Two consecutive MF alignment words
received in error.
Sa4S
RESYNC CRITERIA
RSCLKM
RESE
ITU SPEC
(LSB)
G.706
G.706
G.732
4.1.1
4.1.2
4.3.2
—
4.2
5.2