DS2153QN-A7/T&R Maxim Integrated, DS2153QN-A7/T&R Datasheet - Page 27

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DS2153QN-A7/T&R

Manufacturer Part Number
DS2153QN-A7/T&R
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet

Specifications of DS2153QN-A7/T&R

Product
Framer
Number Of Transceivers
1
Supply Current (max)
65 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
PLCC-44
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
5 V
Supply Voltage - Max
5.25 V
Supply Voltage - Min
4.8 V
Part # Aliases
90-2153Q-NT7
6.2 CRC4 Error Counter
CRC4 Count Register 1 (CRCCR1) is the most significant word and CRCCR2 is the least significant
word of a 10-bit counter that records word errors in the Cyclic Redundancy Check 4 (CRC4). Since the
maximum CRC4 count in a 1-second period is 1000, this counter cannot saturate. The counter is disabled
during loss of sync at either the FAS or CRC4 level; it will continue to count if loss of multiframe sync
occurs at the CAS level.
CRCCR1: CRC4 COUNT REGISTER 1 (Address = 02 Hex)
CRCCR2: CRC4 COUNT REGISTER 2 (Address = 03 Hex)
(MSB)
Note: The upper 6 bits of CRCCR1 at address 02 are the most significant bits of the 12-bit FAS error counter.
6.3 E-Bit Counter
E-bit Count Register 1 (EBCR1) is the most significant word and EBCR2 is the least significant word of
a 10-bit counter that records Far End Block Errors (FEBE) as reported in the first bit of frames 13 and 15
on E1 lines running with CRC4 multiframe. These count registers will increment once each time the
received E-bit is set to 0. Since the maximum E-bit count in a 1-second period is 1000, this counter
cannot saturate. The counter is disabled during loss of sync at either the FAS or CRC4 level; it will
continue to count if loss of multiframe sync occurs at the CAS level.
EBCR1: E-BIT COUNT REGISTER 1 (Address = 04 Hex)
EBCR2: E-BIT COUNT REGISTER 2 (Address = 05 Hex)
Note: The upper 6 bits of EBCR1 at address 04 are the least significant bits of the 12-bit FAS error counter.
(See note)
(See note)
(MSB)
CRC7
EB7
SYMBOL
SYMBOL
CRC9
CRC0
EB9
EB0
(See note)
(See note)
CRC6
EB6
POSITION
POSITION
CRCCR1.1
CRCCR2.0
EBCR1.1
EBCR2.0
(See note)
(See note)
CRC5
EB5
(See note)
(See note)
CRC4
EB4
NAME AND DESCRIPTION
NAME AND DESCRIPTION
MSB of the 10-bit CRC4 error count.
LSB of the 10-bit CRC4 error count.
MSB of the 10-bit E-bit count.
LSB of the 10-bit E-bit count.
(See note)
(See note)
27 of 60
CRC3
EB3
(See note)
(See note)
CRC2
EB2
CRC9
CRC1
EB9
EB1
CRC8
CRC0
(LSB)
(LSB)
EB8
EB0
CRCCR1
CRCCR2
EBCR1
EBCR2

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