DS2153QN-A7/T&R Maxim Integrated, DS2153QN-A7/T&R Datasheet - Page 28

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DS2153QN-A7/T&R

Manufacturer Part Number
DS2153QN-A7/T&R
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet

Specifications of DS2153QN-A7/T&R

Product
Framer
Number Of Transceivers
1
Supply Current (max)
65 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
PLCC-44
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
5 V
Supply Voltage - Max
5.25 V
Supply Voltage - Min
4.8 V
Part # Aliases
90-2153Q-NT7
6.4 FAS Bit Error Counter
FAS Count Register 1 (FASCR1) is the most significant word and FASCR2 is the least significant word
of a 12-bit counter that records word errors in the Frame Alignment Signal in time slot 0. This counter is
disabled during loss of synchronization conditions, (RLOS = 1). Since the maximum FAS word error
count in a 1-second period is 4000, this counter cannot saturate.
FASCR1: FAS BIT COUNT REGISTER 1 (Address = 02 Hex)
FASCR2: FAS BIT COUNT REGISTER 2 (Address = 04 Hex)
Note 1: The lower 2 bits of FASCR1 at address 02 are the most significant bits of the 10-bit CRC4 error counter.
Note 2: The lower 2 bits of FASCR2 at address 04 are the most significant bits of the 10-bit E-bit counter.
(MSB)
FAS11
FAS5
SYMBOL
FAS11
FAS0
FAS10
FAS4
POSITION
FASCR1.7
FASCR2.2
FAS9
FAS3
FAS8
FAS2
NAME AND DESCRIPTION
MSB of the 12-bit FAS error count.
LSB of the 12-bit FAS error count.
28 of 60
FAS7
FAS1
FAS6
FAS0
(Note 1)
(Note 2)
(Note 1)
(Note 2)
(LSB)
FASCR1
FASCR2

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