DS2153QN-A7/T&R Maxim Integrated, DS2153QN-A7/T&R Datasheet - Page 23

• Manufacturer Part Number: DS2153QN-A7/T&R
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS2153QN-A7/T&R

• Product: Framer
• Number Of Transceivers: 1
• Supply Current (max): 65 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: PLCC-44
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 5 V
• Supply Voltage - Max: 5.25 V
• Supply Voltage - Min: 4.8 V
• Part # Aliases: 90-2153Q-NT7

SR2: STATUS REGISTER 2 (Address = 07 Hex)
(MSB)
RMF
SYMBOL
RCMF
LOTC
TSLIP
RMF
TMF
RAF
TAF
SEC
RAF
POSITION
SR2.7
SR2.6
SR2.5
SR2.4
SR2.3
SR2.2
SR2.1
SR2.0
TMF
NAME AND DESCRIPTION
Receive CAS Multiframe. Set every 2ms (regardless if CAS
signaling is enabled or not) on receive multiframe boundaries. Used
to alert the host that signaling data is available.
Receive Align Frame. Set every 250ms at the beginning of align
frames. Used to alert the host that Si and Sa bits are available in the
RAF and RNAF registers.
Transmit Multiframe. Set every 2µs (regardless if CRC4 is
enabled) on transmit multiframe boundaries. Used to alert the host
that signaling data needs to be updated.
1-Second Timer. Set on increments of 1 second based on RCLK. If
CCR2.7 = 1, then this bit will be set every 62.5ms instead of once a
second.
Transmit Align Frame. Set every 250µs at the beginning of align
frames. Used to alert the host that the TAF and TNAF registers
need to be updated.
Loss of Transmit Clock. Set when the TCLK pin has not
transitioned for one channel time (or 3.9µs). Will force pin 16 high
if enabled via TCR2.0. Based on RCLK.
Receive CRC4 Multiframe. Set on CRC4 multiframe boundaries;
will continue to be set every 2ms on an arbitrary boundary if CRC4
is disabled.
Transmit Elastic Store Slip. Set when the elastic store has either
repeated or deleted a frame of data.
SEC
23 of 60
TAF
LOTC
RCMF
TSLIP
(LSB)