MT41J64M16LA-187E:B TR Micron Technology Inc, MT41J64M16LA-187E:B TR Datasheet - Page 42
![IC DDR3 SDRAM 1GBIT 96FBGA](/photos/7/23/72317/mfg557-60-fbga_sml.jpg)
MT41J64M16LA-187E:B TR
Manufacturer Part Number
MT41J64M16LA-187E:B TR
Description
IC DDR3 SDRAM 1GBIT 96FBGA
Manufacturer
Micron Technology Inc
Type
DDR3 SDRAMr
Specifications of MT41J64M16LA-187E:B TR
Format - Memory
RAM
Memory Type
DDR3 SDRAM
Memory Size
1G (64M x 16)
Speed
533MHz
Interface
Parallel
Voltage - Supply
1.425 V ~ 1.575 V
Operating Temperature
0°C ~ 95°C
Package / Case
96-FBGA
Organization
64Mx16
Density
1Gb
Address Bus
16b
Maximum Clock Rate
1.066GHz
Operating Supply Voltage (typ)
1.5V
Package Type
FBGA
Operating Temp Range
0C to 95C
Operating Supply Voltage (max)
1.575V
Operating Supply Voltage (min)
1.425V
Supply Current
265mA
Pin Count
96
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
557-1378-2
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Table 19: I
PDF: 09005aef826aa906
1Gb_DDR3_SDRAM.pdf – Rev. J 05/10 EN
DD7
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
Measurement Loop
2 × nFAW + 4 × nRRD + 1
nFAW + 4 × nRRD + 1
2 × nFAW + nRRD + 1
2 × nFAW + nRRD + 2
2 × nFAW + nRRD + 3
2 × nFAW + 2 × nRRD
2 × nFAW + 3 × nRRD
2 × nFAW + 4 × nRRD
nFAW + 2 × nRRD
nFAW + 3 × nRRD
nFAW + 4 × nRRD
2 × nFAW + nRRD
nFAW + nRRD
2 × nFAW + 1
2 × nFAW + 2
2 × nFAW + 3
4 × nRRD + 1
2 × nFAW
3 × nFAW
nRRD + 1
nRRD + 2
nRRD + 3
2 × nRRD
3 × nRRD
4 × nRRD
nFAW
nRRD
0
1
2
3
Electrical Specifications – I
RDA
RDA
RDA
RDA
ACT
ACT
ACT
ACT
D
D
D
D
D
D
D
Repeat cycle 2 × nFAW + nRRD + 2 until 2 × nFAW + 2 × nRRD - 1
Repeat cycle 2 × nFAW + 4 × nRRD until 3 × nFAW - 1, if needed
0
0
1
0
0
1
1
1
0
0
1
0
0
1
1
Repeat cycle nFAW + 4 × nRRD until 2 × nFAW - 1, if needed
Repeat cycle 2 × nFAW + 2 until 2 × nFAW + nRRD - 1
0
1
0
0
1
0
0
0
0
1
0
0
1
0
0
Repeat cycle 4 × nRRD until nFAW - 1, if needed
42
1
0
0
1
0
0
0
0
1
0
0
1
0
0
0
Repeat cycle nRRD + 2 until 2 × nRRD - 1
Repeat sub-loop 10, use BA[2:0] = 2
Repeat sub-loop 11, use BA[2:0] = 3
Repeat sub-loop 10, use BA[2:0] = 4
Repeat sub-loop 0, use BA[2:0] = 2
Repeat sub-loop 1, use BA[2:0] = 3
Repeat sub-loop 0, use BA[2:0] = 4
Repeat sub-loop 1, use BA[2:0] = 5
Repeat sub-loop 0, use BA[2:0] = 6
Repeat sub-loop 1, use BA[2:0] = 7
1
1
0
1
1
0
0
0
1
1
0
1
1
0
0
Repeat cycle 2 until nRRD - 1
Micron Technology, Inc. reserves the right to change products or specifications without notice.
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DD
Specifications and Conditions
0
0
0
1
1
1
3
7
0
0
0
1
1
1
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
0
0
1
0
0
1
0
0
© 2006 Micron Technology, Inc. All rights reserved.
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
F
F
F
F
F
F
F
F
0
0
0
0
Definitions
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
00000000
00110011
00110011
00000000
–
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