C8051F530-TB Silicon Laboratories Inc, C8051F530-TB Datasheet - Page 131

BOARD PROTOTYPE W/C8051F530

C8051F530-TB

Manufacturer Part Number
C8051F530-TB
Description
BOARD PROTOTYPE W/C8051F530
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheet

Specifications of C8051F530-TB

Contents
Board
Processor To Be Evaluated
C8051F52xA and C8051F53xA
Interface Type
USB
Lead Free Status / RoHS Status
Vendor undefined / Vendor undefined
For Use With/related Products
C8051F530
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
SFR Definition 13.9. P1: Port1
SFR Definition 13.10. P1MDIN: Port1 Input Mode
Bits7–0: P1.[7:0]
Bits7–0: Analog Input Configuration Bits for P1.7–P1.0 (respectively).
P1.7
R/W
R/W
Bit7
Bit7
Write - Output appears on I/O pins per Crossbar Registers.
0: Logic Low Output.
1: Logic High Output (high impedance if corresponding P1MDOUT.n bit = 0).
Read - Always reads 0 if selected as analog input in register P1MDIN. Directly reads Port
pin when configured as digital input.
0: P1.n pin is logic low.
1: P1.n pin is logic high.
Port pins configured as analog inputs have their weak pullup, digital driver, and digital
receiver disabled.
0: Corresponding P1.n pin is configured as an analog input.
1: Corresponding P1.n pin is not configured as an analog input.
P1.6
R/W
R/W
Bit6
Bit6
P1.5
R/W
R/W
Bit5
Bit5
P1.4
R/W
R/W
Bit4
Bit4
C8051F52x/F52xA/F53x/F53xA
Rev. 1.3
P1.3
R/W
R/W
Bit3
Bit3
P1.2
R/W
R/W
Bit2
Bit2
P1.1
R/W
R/W
Bit1
Bit1
SFR Address:
SFR Address:
P1.0
R/W
R/W
Bit0
Bit0
Addressable
Reset Value
Reset Value
11111111
11111111
0x90
0xF2
Bit
131

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