C8051F530-TB Silicon Laboratories Inc, C8051F530-TB Datasheet - Page 178

• Manufacturer Part Number: C8051F530-TB
• Description: BOARD PROTOTYPE W/C8051F530
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F530-TB

• Contents: Board
• Processor To Be Evaluated: C8051F52xA and C8051F53xA
• Interface Type: USB
• Lead Free Status / RoHS Status: Vendor undefined / Vendor undefined
• For Use With/related Products: C8051F530
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

C8051F52x/F52xA/F53x/F53xA
SFR Definition 17.14. LIN0ERR: LIN0 ERROR Register
178
Bits7–5: UNUSED. Read = 000b. Write = don’t care.
Bit4:
Bit3:
Bit2:
Bit1:
Bit0:
Bit7
R
SYNCH: Synchronization Error Bit (slave mode only).
0: No error with the SYNCH FIELD has been detected.
1: Edges of the SYNCH FIELD are outside of the maximum tolerance.
PRTY: Parity Error Bit (slave mode only).
0: No parity error has been detected.
1: A parity error has been detected.
TOUT: Timeout Error Bit.
0: A timeout error has not been detected.
1: A timeout error has been detected. This error is detected whenever one of the following
conditions is met:
•The master is expecting data from a slave and the slave does not respond.
•The slave is expecting data but no data is transmitted on the bus.
•A frame is not finished within the maximum frame length.
•The application does not set the DTACK bit (LIN0CTRL.4) or STOP bit (LIN0CTRL.7) until the
CHK: Checksum Error Bit.
0: Checksum error has not been detected.
1: Checksum error has been detected.
BITERR: Bit Transmission Error Bit.
0: No error in transmission has been detected.
1: The bit value monitored during transmission is different than the bit value sent.
end of the reception of the first byte after the identifier.
Bit6
R
Bit5
R
SYNCH
Bit4
R
Rev. 1.3
PRTY
Bit3
R
TOUT
Bit2
R
CHK
Bit1
R
BITERR
Bit0
Address: 0x0A (indirect)
R
Reset Value
00000000