C8051F530-TB Silicon Laboratories Inc, C8051F530-TB Datasheet - Page 172
C8051F530-TB
Manufacturer Part Number
C8051F530-TB
Description
BOARD PROTOTYPE W/C8051F530
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheet
1.C8051F530-TB.pdf
(218 pages)
Specifications of C8051F530-TB
Contents
Board
Processor To Be Evaluated
C8051F52xA and C8051F53xA
Interface Type
USB
Lead Free Status / RoHS Status
Vendor undefined / Vendor undefined
For Use With/related Products
C8051F530
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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C8051F52x/F52xA/F53x/F53xA
SFR Definition 17.3. LINCF Control Mode Register
172
Bit7:
Bit6:
Bit5:
LINEN
R/W
Bit7
LINEN: LIN Interface Enable bit
0: LIN0 is disabled.
1: LIN0 is enabled.
MODE: LIN Mode Selection
0: LIN0 operates in Slave mode.
1: LIN0 operates in Master mode.
ABAUD: LIN Mode Automatic Baud Rate Selection (slave mode only).
0: Manual baud rate selection is enabled.
1: Automatic baud rate selection is enabled.
MODE
R/W
Bit6
ABAUD
R/W
Bit5
R/W
Bit4
Rev. 1.3
R/W
Bit3
R/W
Bit2
R/W
Bit1
SFR Address:
R/W
Bit0
00000000
Reset Value
0x95
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