C8051F530-TB Silicon Laboratories Inc, C8051F530-TB Datasheet - Page 68

• Manufacturer Part Number: C8051F530-TB
• Description: BOARD PROTOTYPE W/C8051F530
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F530-TB

• Contents: Board
• Processor To Be Evaluated: C8051F52xA and C8051F53xA
• Interface Type: USB
• Lead Free Status / RoHS Status: Vendor undefined / Vendor undefined
• For Use With/related Products: C8051F530
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

C8051F52x/F52xA/F53x/F53xA
SFR Definition 4.9. ADC0TK: ADC0 Tracking Mode Select
68
Bits7–4: AD0PWR3–0: ADC0 Burst Power-Up Time.
Bits3–2: AD0TM1–0: ADC0 Tracking Mode Select Bits.
Bits1–0: AD0TK1–0: ADC0 Post-Track Time.
R/W
Bit7
For BURSTEN = 0:
ADC0 power state controlled by AD0EN.
For BURSTEN = 1 and AD0EN = 1;
ADC0 remains enabled and does not enter the very low power state.
For BURSTEN = 1 and AD0EN = 0:
ADC0 enters the very low power state as specified in Table 2.3 on page 29 and is enabled
after each convert start signal. The Power Up time is programmed according to the following
equation:
00: Reserved.
01: ADC0 is configured to Post-Tracking Mode.
10: ADC0 is configured to Pre-Tracking Mode.
11: ADC0 is configured to Dual-Tracking Mode (default).
Post-Tracking time is controlled by AD0TK as follows:
00: Post-Tracking time is equal to 2 SAR clock cycles + 2 FCLK cycles.
01: Post-Tracking time is equal to 4 SAR clock cycles + 2 FCLK cycles.
10: Post-Tracking time is equal to 8 SAR clock cycles + 2 FCLK cycles.
11: Post-Tracking time is equal to 16 SAR clock cycles + 2 FCLK cycles.
AD0PWR
R/W
Bit6
AD0PWR
=
Tstartup
---------------------- 1
R/W
Bit5
200ns
–
R/W
Bit4
or
Tstartup
Rev. 1.3
R/W
Bit3
AD0TM
=
R/W
Bit2

AD0PWR
R/W
Bit1
+
AD0TK
1
(bit addressable)
200ns
R/W
Bit0
SFR Address:
Reset Value
11111111
0xBA