MC-78F0712-KIT Renesas Electronics America, MC-78F0712-KIT Datasheet - Page 126
MC-78F0712-KIT
Manufacturer Part Number
MC-78F0712-KIT
Description
KIT REF SYSTEM 78K0 UPD78F0712
Manufacturer
Renesas Electronics America
Specifications of MC-78F0712-KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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(5) Port mode register 5 (PM5)
Cautions 1. When the internal low-speed oscillation clock is selected as the source clock to the CPU, the
This register sets port 5 input/output in 1-bit units.
When using the P54/TO00/TI001 pin for timer output, clear PM54 and the output latch of P54 to 0.
When using the P54/TO00/TI001 and P53/TI000/INTP5 pins for timer input, clear PM54 and PM53 to 1. At this
time, the output latches of P54 and P53 may be 0 or 1.
PM5 can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input sets PM5 to FFH.
Address: FF25H
Symbol
PM5
2. Always set data to PRM00 after stopping the timer operation.
3. If the valid edge of the TI000 pin is to be set for the count clock, do not set the clear & start
4. If the TI000 or TI001 pin is high level immediately after system reset, the rising edge is
5. When P54 is used as the TI001 pin valid edge, it cannot be used as the timer output (TO00),
clock of the internal low-speed oscillator is divided and supplied as the count clock. If the
count clock is the internal low-speed oscillation clock, the operation of 16-bit timer/event
counter 00 is not guaranteed. When an external clock is used and when the internal low-
speed oscillation clock is selected as the source clock to the CPU, the operation of 16-bit
timer/event counter 00 is not guaranteed, either, because the internal low-speed oscillation
clock is supplied as the sampling clock to eliminate noise.
mode using the valid edge of the TI000 pin and the capture trigger.
immediately detected after the rising edge or both the rising and falling edges are set as the
valid edge(s) of the TI000 pin or TI001 pin to enable the operation of 16-bit timer counter 00
(TM00). Care is therefore required when pulling up the TI000 or TI001 pin. However, when re-
enabling operation after the operation has been stopped once, the rising edge is not
detected.
and when used as TO00, it cannot be used as the TI001 pin valid edge.
PM57
PM5n
7
0
1
After reset: FFH
Output mode (output buffer on)
Input mode (output buffer off)
PM56
Figure 7-9. Format of Port Mode Register 5 (PM5)
6
CHAPTER 7 16-BIT TIMER/EVENT COUNTER 00
R/W
PM55
User’s Manual U17890EJ2V0UD
5
P5n pin I/O mode selection (n = 0 to 7)
PM54
4
PM53
3
PM52
2
PM51
1
PM50
0
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