MC-78F0712-KIT Renesas Electronics America, MC-78F0712-KIT Datasheet - Page 265
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MC-78F0712-KIT
Manufacturer Part Number
MC-78F0712-KIT
Description
KIT REF SYSTEM 78K0 UPD78F0712
Manufacturer
Renesas Electronics America
Specifications of MC-78F0712-KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 265 of 376
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Note Be sure to clear bits 5 and 7 of IF0L to 0.
Cautions 1. When operating a timer, serial interface, or A/D converter after standby release, operate it
Address: FFE0H After reset: 00H R/W
Symbol
IF0L
Address: FFE1H
Symbol
IF0H
Address: FFE2H
Symbol
IF1L
Address: FFE3H
Symbol
IF1H
Be sure to clear bits 0 and 5 to 7 of IF0H to 0.
Be sure to clear bits 0 and 1 of IF1L to 0.
Be sure to clear bits 1 and 2 and 5 to 7 of IF1H to 0.
2. When manipulating a flag of the interrupt request flag register, use a 1-bit memory
Figure 16-2. Format of Interrupt Request Flag Registers (IF0L, IF0H, IF1L, IF1H)
once after clearing the interrupt request flag. An interrupt request flag may be set by noise.
manipulation instruction (CLR1). When describing in C language, use a bit manipulation
instruction such as “IF0L.0 = 0;” or “_asm(“clr1 IF0L, 0”);” because the compiled
assemblermust be a 1-bit memory manipulation instruction (CLR1).
described in C language using an 8-bit memory manipulation instruction such as “IF0L &=
0xfe;” and compiled, it becomes the assembler of three instructions.
In this case, even if the request flag of another bit of the same interrupt request flag register
(IF0L) is set to 1 at the timing between “mov a, IF0L” and “mov IF0L, a”, the flag is cleared
to 0 at “mov IF0L, a”. Therefore, care must be exercised when using an 8-bit memory
manipulation instruction in C language.
TMIF50
XXIFX
<7>
0
0
0
7
Note
7
Note
7
Note
0
1
After reset: 00H
After reset: 00H
After reset: 00H
mov a, IF0L
and a, #0FEH
mov IF0L, a
No interrupt request signal is generated
Interrupt request is generated, interrupt request status
STIF00
PIF5
<6>
0
<6>
0
6
Note
6
Note
CHAPTER 16 INTERRUPT FUNCTIONS
R/W
R/W
R/W
SRIF00
0
0
<5>
0
User’s Manual U17890EJ2V0UD
5
Note
5
Note
5
Note
CM5IFW0
SREIF00
ADIF
PIF3
<4>
<4>
<4>
<4>
Interrupt request flag
CM4IFW0
TMIF01
DMUIF
PIF2
<3>
<3>
<3>
<3>
CM3IFW0
TMIF00
PIF1
<2>
<2>
<2>
0
2
Note
UDIFW0
PIF0
<1>
<1>
0
0
1
Note
1
Note
If a program is
TMIF51
LVIIF
<0>
0
0
<0>
0
Note
0
Note
263
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