MC-78F0712-KIT Renesas Electronics America, MC-78F0712-KIT Datasheet - Page 55
MC-78F0712-KIT
Manufacturer Part Number
MC-78F0712-KIT
Description
KIT REF SYSTEM 78K0 UPD78F0712
Manufacturer
Renesas Electronics America
Specifications of MC-78F0712-KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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3.4.7
[Function]
[Operand format]
[Description example]
[Illustration]
8-bit immediate data is added as offset data to the contents of the base register, that is, the HL register pair in
the register bank specified by the register bank select flag (RBS0 and RBS1), and the sum is used to address
the memory. Addition is performed by expanding the offset data as a positive number to 16 bits. A carry from
the 16th bit is ignored. This addressing can be carried out for all the memory spaces.
MOV A, [HL + 10H]; when setting byte to 10H
Based addressing
The contents of the memory
addressed are transferred.
HL
A
Identifier
16
7
[HL + byte]
Operation code
H
CHAPTER 3 CPU ARCHITECTURE
User’s Manual U17890EJ2V0UD
8
0
7
7
1
0
Description
0
0
1
0
0
1
Memory
L
1
0
1
0
1
0
0
0
0
0
10H
53
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