MC-78F0712-KIT Renesas Electronics America, MC-78F0712-KIT Datasheet - Page 52

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MC-78F0712-KIT

Manufacturer Part Number
MC-78F0712-KIT
Description
KIT REF SYSTEM 78K0 UPD78F0712
Manufacturer
Renesas Electronics America
Datasheets

Specifications of MC-78F0712-KIT

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
3.4.4
50
Effective address
[Function]
[Operand format]
[Description example]
[Illustration]
The memory to be manipulated in the fixed space is directly addressed with 8-bit data in an instruction word.
This addressing is applied to the 256-byte space FE20H to FF1FH. Internal RAM and special function registers
(SFRs) are mapped at FE20H to FEFFH and FF00H to FF1FH, respectively.
The SFR area (FF00H to FF1FH) where short direct addressing is applied is a part of the overall SFR area.
Ports that are frequently accessed in a program and compare and capture registers of the timer/event counter
are mapped in this area, allowing SFRs to be manipulated with a small number of bytes and clocks.
When 8-bit immediate data is at 20H to FFH, bit 8 of an effective address is cleared to 0. When it is at 00H to
1FH, bit 8 is set to 1. Refer to the [Illustration].
MOV 0FE30H, A; when transferring value of A register to saddr (FE30H)
When 8-bit immediate data is 20H to FFH,
When 8-bit immediate data is 00H to 1FH,
Short direct addressing
saddr
saddrp
Identifier
15
7
1
Operation code
1
1
saddr-offset
Immediate data that indicate label or FE20H to FF1FH
Immediate data that indicate label or FE20H to FF1EH (even address only)
OP code
1
1
1
CHAPTER 3 CPU ARCHITECTURE
1
1
0
User’s Manual U17890EJ2V0UD
0
8 7
1
0
= 1
= 0
1
1
1
1
0
0
Description
0
0
1
0
0
0
OP code
30H (saddr-offset)
0
Short direct memory

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